Searched refs:SCLK_UART3 (Results 1 – 20 of 20) sorted by relevance
| /Linux-v4.19/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 101 #define SCLK_UART3 6 macro
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| D | s5pv210.h | 197 #define SCLK_UART3 172 macro
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| D | rk3188-cru-common.h | 32 #define SCLK_UART3 67 macro
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| D | px30-cru.h | 28 #define SCLK_UART3 26 macro
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| D | rk3288-cru.h | 44 #define SCLK_UART3 80 macro
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| D | rk3368-cru.h | 42 #define SCLK_UART3 80 macro
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| D | rk3399-cru.h | 50 #define SCLK_UART3 84 macro
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | rk3xxx.dtsi | 388 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| D | s5pv210.dtsi | 372 <&clocks SCLK_UART3>;
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| D | rk3288.dtsi | 455 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| /Linux-v4.19/drivers/clk/samsung/ |
| D | clk-s5pv210.c | 716 GATE(SCLK_UART3, "sclk_uart3", "dout_uart3", CLK_SRC_MASK0, 15,
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| D | clk-exynos7.c | 781 GATE(SCLK_UART3, "sclk_uart3_user", "mout_sclk_uart3_user",
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| /Linux-v4.19/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 252 <&clock_peric1 SCLK_UART3>;
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| /Linux-v4.19/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 278 MUX(SCLK_UART3, "sclk_uart3", mux_sclk_uart3_p, 0,
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| D | clk-rk3368.c | 273 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3288.c | 257 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
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| D | clk-px30.c | 668 GATE(SCLK_UART3, "clk_uart3", "clk_uart3_mux", CLK_SET_RATE_PARENT,
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| D | clk-rk3399.c | 280 MUX(SCLK_UART3, "clk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
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| /Linux-v4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 380 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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| D | rk3399.dtsi | 640 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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