Searched refs:SCLK_I2S1 (Results 1 – 19 of 19) sorted by relevance
| /Linux-v4.19/include/dt-bindings/clock/ |
| D | s3c2443.h | 36 #define SCLK_I2S1 19 macro
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| D | exynos7-clk.h | 120 #define SCLK_I2S1 25 macro
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| D | rk3188-cru-common.h | 41 #define SCLK_I2S1 76 macro
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| D | rk3128-cru.h | 38 #define SCLK_I2S1 81 macro
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| D | rk3228-cru.h | 37 #define SCLK_I2S1 81 macro
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| D | rv1108-cru.h | 35 #define SCLK_I2S1 76 macro
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| D | px30-cru.h | 22 #define SCLK_I2S1 20 macro
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| D | rk3328-cru.h | 40 #define SCLK_I2S1 42 macro
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| /Linux-v4.19/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 335 GATE(SCLK_I2S1, "sclk_i2s1", "div_i2s1", SCLKCON, 5, 0, 0),
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| D | clk-exynos7.c | 793 GATE(SCLK_I2S1, "sclk_i2s1_user", "sclk_i2s1",
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| /Linux-v4.19/drivers/clk/rockchip/ |
| D | clk-rk3128.c | 381 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3228.c | 442 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3188.c | 558 MUX(SCLK_I2S1, "sclk_i2s1", mux_sclk_i2s1_p, 0,
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| D | clk-rk3328.c | 394 GATE(SCLK_I2S1, "clk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
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| D | clk-rv1108.c | 529 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
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| D | clk-px30.c | 609 GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT,
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | rk3066a.dtsi | 87 clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
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| D | rk322x.dtsi | 153 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
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| /Linux-v4.19/arch/arm64/boot/dts/rockchip/ |
| D | rk3328.dtsi | 189 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
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