Searched refs:Reset (Results 1 – 25 of 248) sorted by relevance
12345678910
| /Linux-v4.19/drivers/reset/ |
| D | Kconfig | 5 bool "Reset Controller Support"
8 Generic Reset Controller support.
18 tristate "Altera Arria10 System Resource Reset"
25 bool "AR71xx Reset Driver" if COMPILE_TEST
32 bool "AXS10x Reset Driver" if COMPILE_TEST
38 bool "Berlin Reset Driver" if COMPILE_TEST
44 bool "Synopsys HSDK Reset Driver"
51 bool "i.MX7 Reset Driver" if COMPILE_TEST
59 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
65 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
[all …]
|
| /Linux-v4.19/Documentation/hwmon/ |
| D | ltc3815 | 39 in1_reset_history Reset input voltage history.
45 in2_reset_history Reset output voltage history.
50 temp1_reset_history Reset temperature history.
55 curr1_reset_history Reset input current history.
61 curr2_reset_history Reset output current history.
|
| D | ltc2978 | 119 in1_reset_history Reset input voltage history.
140 in[N]_reset_history Reset output voltage history.
171 temp[N]_reset_history Reset temperature history. Not supported for chip
192 curr1_reset_history Reset input current history. LTC3883 and LTC3886 only.
211 curr[N]_reset_history Reset output current history.
|
| /Linux-v4.19/Documentation/devicetree/bindings/watchdog/ |
| D | aspeed-wdt.txt | 15 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
25 Reset types:
27 - cpu: Reset CPU on watchdog timeout
29 - soc: Reset 'System on Chip' on watchdog timeout
31 - system: Reset system on watchdog timeout
|
| /Linux-v4.19/Documentation/devicetree/bindings/reset/ |
| D | nxp,lpc1850-rgu.txt | 1 NXP LPC1850 Reset Generation Unit (RGU)
18 Reset Peripheral
64 Reset provider example:
73 Reset consumer example:
|
| D | zynq-reset.txt | 1 Xilinx Zynq Reset Manager
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
24 Reset outputs:
|
| D | ti-syscon-reset.txt | 1 TI SysCon Reset Controller
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
49 SysCon Reset Consumer Nodes
|
| D | renesas,rst.txt | 1 DT bindings for the Renesas R-Car and RZ/G Reset Controllers
3 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
7 - Reset control of peripheral devices (on R-Car Gen1),
|
| D | reset.txt | 1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
|
| D | ti,sci-reset.txt | 1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
12 TI-SCI Reset Controller Node
24 TI-SCI Reset Consumer Nodes
|
| D | st,stm32-rcc.txt | 1 STMicroelectronics STM32 Peripheral Reset Controller
|
| D | st,stm32mp1-rcc.txt | 1 STMicroelectronics STM32MP1 Peripheral Reset Controller
|
| D | socfpga-reset.txt | 1 Altera SOCFPGA Reset Manager
|
| /Linux-v4.19/drivers/reset/hisilicon/ |
| D | Kconfig | 2 tristate "Hi3660 Reset Driver"
9 tristate "Hi6220 Reset Driver"
|
| /Linux-v4.19/arch/arc/kernel/ |
| D | head.S | 55 ; Default Reset Handler (jumped into from Reset vector)
|
| /Linux-v4.19/Documentation/mmc/ |
| D | mmc-tools.txt | 23 - Permanently enable the eMMC H/W Reset feature.
24 - Permanently disable the eMMC H/W Reset feature.
|
| /Linux-v4.19/Documentation/devicetree/bindings/clock/ |
| D | nvidia,tegra210-car.txt | 1 NVIDIA Tegra210 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra114-car.txt | 1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra20-car.txt | 1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra30-car.txt | 1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | renesas,cpg-mssr.txt | 1 * Renesas Clock Pulse Generator / Module Standby and Software Reset
4 and MSSR (Module Standby and Software Reset) blocks are intimately connected,
12 2. Reset Control, to perform a software reset of individual SoC devices.
|
| /Linux-v4.19/init/ |
| D | initramfs.c | 188 Reset enumerator
321 next_state = Reset; in do_name()
389 next_state = Reset; in do_symlink()
401 [Reset] = do_reset,
430 state = Reset; in flush_buffer()
490 if (state != Reset) in unpack_to_rootfs()
|
| /Linux-v4.19/Documentation/devicetree/bindings/mfd/ |
| D | altera-a10sr.txt | 20 a10sr_rst Reset Controller
30 Arria10 Peripheral PHY Reset
|
| /Linux-v4.19/Documentation/devicetree/bindings/net/nfc/ |
| D | nfcmrvl.txt | 57 /* Reset IO */
81 /* Reset IO */
|
| /Linux-v4.19/Documentation/devicetree/bindings/power/reset/ |
| D | brcm,bcm21664-resetmgr.txt | 1 Broadcom Kona Family Reset Manager
|
12345678910
