Searched refs:QSPI (Results 1 – 24 of 24) sorted by relevance
1 TI QSPI controller.5 - reg: Should contain QSPI registers location and length.12 - ti,hwmods: Name of the hwmod associated to the QSPI19 - syscon-chipselects: Handle to system control region contains QSPI22 NOTE: TI QSPI controller requires different pinmux and IODelay26 specified in the slave nodes of TI QSPI controller without appropriate
1 Device tree configuration for Renesas RSPI/QSPI driver
155 label = "QSPI.SPL";159 label = "QSPI.SPL.backup1";163 label = "QSPI.SPL.backup2";167 label = "QSPI.SPL.backup3";171 label = "QSPI.u-boot";175 label = "QSPI.u-boot-spl-os";179 label = "QSPI.u-boot-env";183 label = "QSPI.u-boot-env.backup1";187 label = "QSPI.kernel";191 label = "QSPI.file-system";
475 label = "QSPI.SPL";479 label = "QSPI.SPL.backup1";483 label = "QSPI.SPL.backup2";487 label = "QSPI.SPL.backup3";491 label = "QSPI.u-boot";495 label = "QSPI.u-boot-spl-os";499 label = "QSPI.u-boot-env";503 label = "QSPI.u-boot-env.backup1";507 label = "QSPI.kernel";511 label = "QSPI.file-system";
452 label = "QSPI.SPL";456 label = "QSPI.u-boot";460 label = "QSPI.u-boot-spl-os";464 label = "QSPI.u-boot-env";468 label = "QSPI.u-boot-env.backup1";472 label = "QSPI.kernel";476 label = "QSPI.file-system";
288 label = "QSPI.u-boot-spl-os";292 label = "QSPI.u-boot-env";296 label = "QSPI.skern";300 label = "QSPI.pmmc-firmware";304 label = "QSPI.kernel";308 label = "QSPI.file-system";
343 label = "QSPI.u-boot";347 label = "QSPI.u-boot-env";351 label = "QSPI.skern";355 label = "QSPI.pmmc-firmware";359 label = "QSPI.kernel";363 label = "QSPI.u-boot-spl-os";367 label = "QSPI.file-system";
459 label = "QSPI.U_BOOT";463 label = "QSPI.U_BOOT.backup";467 label = "QSPI.U-BOOT-SPL_OS";471 label = "QSPI.U_BOOT_ENV";475 label = "QSPI.U-BOOT-ENV.backup";479 label = "QSPI.KERNEL";483 label = "QSPI.FILESYSTEM";
733 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */876 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */898 label = "QSPI.U_BOOT";902 label = "QSPI.U_BOOT.backup";906 label = "QSPI.U-BOOT-SPL_OS";910 label = "QSPI.U_BOOT_ENV";914 label = "QSPI.U-BOOT-ENV.backup";918 label = "QSPI.KERNEL";922 label = "QSPI.FILESYSTEM";
759 label = "QSPI.U_BOOT";763 label = "QSPI.U_BOOT.backup";767 label = "QSPI.U-BOOT-SPL_OS";771 label = "QSPI.U_BOOT_ENV";775 label = "QSPI.U-BOOT-ENV.backup";779 label = "QSPI.KERNEL";783 label = "QSPI.FILESYSTEM";
9 - clocks: the phandle of the clock needed by the QSPI controller10 - A pinctrl must be defined to set pins in mode of operation for QSPI transfer19 - reg: chip-Select number (QSPI controller may connect 2 nor flashes)32 resets = <&rcc STM32F4_AHB3_RESET(QSPI)>;33 clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>;
10 address and length of the QSPI Controller data area.19 - cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch20 the read data rather than the QSPI clock. Make sure that QSPI return
1 * Atmel Quad Serial Peripheral Interface (QSPI)11 - clocks: The phandle of the clock needed by the QSPI controller.
13 - Dual mode QSPI
340 QSPI, enumerator432 INTC_VECT(QSPI, 0xE60),440 INTC_GROUP(SPI, HSPI, RSPI, QSPI),
120 #define QSPI 107 macro
57 Cadence QSPI is a specialized controller for connecting an SPI59 device with a Cadence QSPI controller and want to access the
1395 …PINGROUP(qspi_sck_pee0, QSPI, RSVD1, RSVD2, RSVD3, 0x3088, Y, Y, N, 0x…1396 …PINGROUP(qspi_cs_n_pee1, QSPI, RSVD1, RSVD2, RSVD3, 0x308c, Y, Y, N, -1…1397 …PINGROUP(qspi_io0_pee2, QSPI, RSVD1, RSVD2, RSVD3, 0x3090, Y, Y, N, -1…1398 …PINGROUP(qspi_io1_pee3, QSPI, RSVD1, RSVD2, RSVD3, 0x3094, Y, Y, N, -1…1399 …PINGROUP(qspi_io2_pee4, QSPI, RSVD1, RSVD2, RSVD3, 0x3098, Y, Y, N, -1…1400 …PINGROUP(qspi_io3_pee5, QSPI, RSVD1, RSVD2, RSVD3, 0x309c, Y, Y, N, -1…
185 tristate "Freescale Coldfire QSPI controller"188 This enables support for the Coldfire QSPI controller in master437 tristate "DRA7xxx QSPI controller support"440 QSPI master controller for DRA7xxx used for flash devices.518 tristate "Renesas RSPI/QSPI controller"521 SPI driver for Renesas RSPI and QSPI blocks.
117 QSPI FIFO ECC121 - altr,ecc-parent : phandle to parent QSPI node.
429 bool "Altera QSPI FIFO ECC"433 Altera QSPI FIFO Memory for Altera SoCs.
1893 PCLK(QSPI, "qspi", "ck_axi", CLK_IGNORE_UNUSED, G_QSPI),
