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Searched refs:POSTING_READ (Results 1 – 25 of 32) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_hdmi.c186 POSTING_READ(VIDEO_DIP_CTL); in g4x_write_infoframe()
243 POSTING_READ(reg); in ibx_write_infoframe()
306 POSTING_READ(reg); in cpt_write_infoframe()
361 POSTING_READ(reg); in vlv_write_infoframe()
415 POSTING_READ(ctl_reg); in hsw_write_infoframe()
578 POSTING_READ(reg); in g4x_set_infoframes()
597 POSTING_READ(reg); in g4x_set_infoframes()
717 POSTING_READ(reg); in ibx_set_infoframes()
738 POSTING_READ(reg); in ibx_set_infoframes()
768 POSTING_READ(reg); in cpt_set_infoframes()
[all …]
Dintel_fifo_underrun.c100 POSTING_READ(reg); in i9xx_check_fifo_underruns()
119 POSTING_READ(reg); in i9xx_set_fifo_underrun_reporting()
151 POSTING_READ(GEN7_ERR_INT); in ivybridge_check_fifo_underruns()
217 POSTING_READ(SERR_INT); in cpt_check_pch_fifo_underruns()
Dicl_dsi.c47 POSTING_READ(ICL_DSI_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
53 POSTING_READ(ICL_DPHY_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
Di915_irq.c137 POSTING_READ(GEN8_##type##_IMR(which)); \
140 POSTING_READ(GEN8_##type##_IIR(which)); \
142 POSTING_READ(GEN8_##type##_IIR(which)); \
147 POSTING_READ(type##IMR); \
150 POSTING_READ(type##IIR); \
152 POSTING_READ(type##IIR); \
179 POSTING_READ(reg); in gen3_assert_iir_is_zero()
181 POSTING_READ(reg); in gen3_assert_iir_is_zero()
204 POSTING_READ(GEN8_##type##_IMR(which)); \
211 POSTING_READ(type##IMR); \
[all …]
Di915_gem_fence_reg.c108 POSTING_READ(fence_reg_lo); in i965_write_fence_reg()
112 POSTING_READ(fence_reg_lo); in i965_write_fence_reg()
152 POSTING_READ(reg); in i915_write_fence_reg()
184 POSTING_READ(reg); in i830_write_fence_reg()
Dintel_dpll_mgr.c395 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_enable()
404 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_enable()
422 POSTING_READ(PCH_DPLL(id)); in ibx_pch_dpll_disable()
481 POSTING_READ(WRPLL_CTL(id)); in hsw_ddi_wrpll_enable()
489 POSTING_READ(SPLL_CTL); in hsw_ddi_spll_enable()
501 POSTING_READ(WRPLL_CTL(id)); in hsw_ddi_wrpll_disable()
511 POSTING_READ(SPLL_CTL); in hsw_ddi_spll_disable()
941 POSTING_READ(DPLL_CTRL1); in skl_ddi_pll_write_ctrl1()
954 POSTING_READ(regs[id].cfgcr1); in skl_ddi_pll_enable()
955 POSTING_READ(regs[id].cfgcr2); in skl_ddi_pll_enable()
[all …]
Dintel_pipe_crc.c498 POSTING_READ(PIPE_CRC_CTL(crtc->index)); in intel_crtc_set_crc_source()
536 POSTING_READ(PIPE_CRC_CTL(crtc->index)); in intel_crtc_enable_pipe_crc()
551 POSTING_READ(PIPE_CRC_CTL(crtc->index)); in intel_crtc_disable_pipe_crc()
Dintel_ddi.c1136 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
1166 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1176 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
1185 POSTING_READ(FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
1207 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
1212 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1219 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
1228 POSTING_READ(FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
2566 POSTING_READ(DPCLKA_CFGCR0_ICL); in icl_map_plls_to_ports()
2979 POSTING_READ(CHICKEN_TRANS(transcoder)); in intel_enable_ddi_hdmi()
[all …]
Dintel_dp.c578 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
581 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
584 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
2162 POSTING_READ(pp_ctrl_reg); in edp_panel_vdd_on()
2224 POSTING_READ(pp_ctrl_reg); in edp_panel_vdd_off_sync()
2312 POSTING_READ(pp_ctrl_reg); in edp_panel_on()
2320 POSTING_READ(pp_ctrl_reg); in edp_panel_on()
2328 POSTING_READ(pp_ctrl_reg); in edp_panel_on()
2371 POSTING_READ(pp_ctrl_reg); in edp_panel_off()
2413 POSTING_READ(pp_ctrl_reg); in _intel_edp_backlight_on()
[all …]
Dintel_panel.c844 POSTING_READ(BLC_PWM_PCH_CTL1); in lpt_enable_backlight()
879 POSTING_READ(BLC_PWM_CPU_CTL2); in pch_enable_backlight()
893 POSTING_READ(BLC_PWM_PCH_CTL1); in pch_enable_backlight()
922 POSTING_READ(BLC_PWM_CTL); in i9xx_enable_backlight()
965 POSTING_READ(BLC_PWM_CTL2); in i965_enable_backlight()
997 POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); in vlv_enable_backlight()
1044 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); in bxt_enable_backlight()
1075 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); in cnp_enable_backlight()
Dintel_display.c1395 POSTING_READ(DPLL(pipe)); in _vlv_enable_pll()
1421 POSTING_READ(DPLL_MD(pipe)); in vlv_enable_pll()
1490 POSTING_READ(DPLL_MD(pipe)); in chv_enable_pll()
1544 POSTING_READ(reg); in i9xx_enable_pll()
1562 POSTING_READ(reg); in i9xx_enable_pll()
1590 POSTING_READ(DPLL(pipe)); in i9xx_disable_pll()
1606 POSTING_READ(DPLL(pipe)); in vlv_disable_pll()
1623 POSTING_READ(DPLL(pipe)); in chv_disable_pll()
1862 POSTING_READ(reg); in intel_enable_pipe()
3897 POSTING_READ(reg); in intel_fdi_normal_train()
[all …]
Dintel_crt.c441 POSTING_READ(crt->adpa_reg); in intel_ironlake_crt_detect_hotplug()
669 POSTING_READ(pipeconf_reg); in intel_crt_load_detect()
896 POSTING_READ(crt->adpa_reg); in intel_crt_reset()
Dintel_color.c486 POSTING_READ(GAMMA_MODE(pipe)); in broadwell_load_luts()
544 POSTING_READ(GAMMA_MODE(pipe)); in glk_load_luts()
Dintel_lvds.c324 POSTING_READ(lvds_encoder->reg); in intel_enable_lvds()
344 POSTING_READ(lvds_encoder->reg); in intel_disable_lvds()
Dintel_i2c.c233 POSTING_READ(bus->gpio_reg); in set_clock()
250 POSTING_READ(bus->gpio_reg); in set_data()
Dintel_csr.c226 POSTING_READ(DC_STATE_DEBUG); in gen9_set_dc_state_debugmask()
Dvlv_dsi_pll.c534 POSTING_READ(BXT_DSI_PLL_CTL); in bxt_dsi_pll_enable()
Dintel_guc.c412 POSTING_READ(guc_send_reg(guc, i - 1)); in intel_guc_send_mmio()
Dintel_uncore.c1795 POSTING_READ(VDECCLK_GATE_D); in g4x_do_reset()
1818 POSTING_READ(VDECCLK_GATE_D); in g4x_do_reset()
1848 POSTING_READ(ILK_GDSR); in ironlake_do_reset()
Dintel_tv.c1180 POSTING_READ(TV_DAC); in intel_tv_detect_type()
1209 POSTING_READ(TV_CTL); in intel_tv_detect_type()
Dintel_cdclk.c961 POSTING_READ(DPLL_CTRL1); in skl_dpll0_enable()
1056 POSTING_READ(CDCLK_CTL); in skl_set_cdclk()
1071 POSTING_READ(CDCLK_CTL); in skl_set_cdclk()
Dintel_sdvo.c231 POSTING_READ(intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
238 POSTING_READ(intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
255 POSTING_READ(GEN3_SDVOB); in intel_sdvo_write_sdvox()
258 POSTING_READ(GEN3_SDVOC); in intel_sdvo_write_sdvox()
Dintel_pm.c358 POSTING_READ(FW_BLC_SELF_VLV); in _intel_set_memory_cxsr()
362 POSTING_READ(FW_BLC_SELF); in _intel_set_memory_cxsr()
371 POSTING_READ(DSPFW3); in _intel_set_memory_cxsr()
377 POSTING_READ(FW_BLC_SELF); in _intel_set_memory_cxsr()
388 POSTING_READ(INSTPM); in _intel_set_memory_cxsr()
955 POSTING_READ(DSPFW1); in g4x_write_wm_values()
1034 POSTING_READ(DSPFW1); in vlv_write_wm_values()
6193 POSTING_READ(VIDSTART); in ironlake_enable_drps()
8090 POSTING_READ(ECR); in intel_init_emon()
8412 POSTING_READ(DSPSURF(pipe)); in g4x_disable_trickle_feed()
[all …]
Dvlv_dsi.c721 POSTING_READ(port_ctrl); in intel_dsi_port_enable()
740 POSTING_READ(port_ctrl); in intel_dsi_port_disable()
/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Daperture_gm.c145 POSTING_READ(fence_reg_lo); in intel_vgpu_write_fence()
149 POSTING_READ(fence_reg_lo); in intel_vgpu_write_fence()

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