137 	POSTING_READ(GEN8_##type##_IMR(which)); \
140 	POSTING_READ(GEN8_##type##_IIR(which)); \
142 	POSTING_READ(GEN8_##type##_IIR(which)); \
147 	POSTING_READ(type##IMR); \
150 	POSTING_READ(type##IIR); \
152 	POSTING_READ(type##IIR); \
179 	POSTING_READ(reg);  in gen3_assert_iir_is_zero()
181 	POSTING_READ(reg);  in gen3_assert_iir_is_zero()
204 	POSTING_READ(GEN8_##type##_IMR(which)); \
211 	POSTING_READ(type##IMR); \
323 		POSTING_READ(DEIMR);  in ilk_update_display_irq()
410 		POSTING_READ(gen6_pm_imr(dev_priv));  in snb_update_pm_irq()
443 	POSTING_READ(reg);  in gen6_reset_pm_iir()
602 		POSTING_READ(GEN8_DE_PORT_IMR);  in bdw_update_port_irq()
634 		POSTING_READ(GEN8_DE_PIPE_IMR(pipe));  in bdw_update_pipe_irq()
660 	POSTING_READ(SDEIMR);  in ibx_display_interrupt_update()
724 	POSTING_READ(reg);  in i915_enable_pipestat()
747 	POSTING_READ(reg);  in i915_disable_pipestat()
1394 	POSTING_READ(GEN7_MISCCPCTL);  in ivybridge_parity_work()
1413 		POSTING_READ(reg);  in ivybridge_parity_work()
3481 	POSTING_READ(SDEIER);  in ibx_irq_pre_postinstall()
3564 	POSTING_READ(VLV_MASTER_IER);  in valleyview_irq_reset()
3588 	POSTING_READ(GEN8_MASTER_IRQ);  in gen8_irq_reset()
3631 	POSTING_READ(GEN11_GFX_MSTR_IRQ);  in gen11_irq_reset()
3699 	POSTING_READ(GEN8_MASTER_IRQ);  in cherryview_irq_reset()
3825 	POSTING_READ(GEN11_DE_HPD_IMR);  in gen11_hpd_irq_setup()
4116 	POSTING_READ(VLV_MASTER_IER);  in valleyview_irq_postinstall()
4234 	POSTING_READ(GEN8_MASTER_IRQ);  in gen8_irq_postinstall()
4273 	POSTING_READ(SDEIER);  in icp_irq_postinstall()
4297 	POSTING_READ(GEN11_GFX_MSTR_IRQ);  in gen11_irq_postinstall()
4314 	POSTING_READ(GEN8_MASTER_IRQ);  in cherryview_irq_postinstall()