Searched refs:PB5 (Results 1 – 15 of 15) sorted by relevance
25 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
25 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
107 pins = "PB5";
74 interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
633 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */662 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
709 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */733 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
609 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
85 - GP21 MDT2005 PB5 pin 11
332 #define PB5 21 macro
302 PINMUX_GPIO(PB5),
424 PINMUX_GPIO(PB5),
688 PINMUX_GPIO(PB5),
724 PINMUX_GPIO(PB5),
1099 PINMUX_GPIO(PB5),
1477 PINMUX_GPIO(PB5),
