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Searched refs:Op2 (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/arch/arm/kvm/
Dcoproc.c388 { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32,
392 { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32,
396 { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32,
400 { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32,
405 { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32,
407 { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32,
409 { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32,
415 { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32,
419 { CRn( 5), CRm( 0), Op1( 0), Op2( 0), is32,
421 { CRn( 5), CRm( 0), Op1( 0), Op2( 1), is32,
[all …]
Dcoproc.h26 unsigned long Op2; member
38 unsigned long Op2; member
66 p->CRn, p->CRm, p->Op1, p->Op2, in print_cp_instr()
124 if (i1->Op2 != i2->Op2) in cmp_reg()
125 return i1->Op2 - i2->Op2; in cmp_reg()
134 #define Op2(_x) .Op2 = _x macro
Dtrace.h13 unsigned long CRm, unsigned long Op2, bool is_write),
14 TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write),
21 __field( unsigned int, Op2 )
31 __entry->Op2 = Op2;
37 __entry->CRm, __entry->Op2)
Dcoproc_a15.c36 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
Dcoproc_a7.c39 { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
/Linux-v4.19/arch/arm64/kvm/
Dsys_regs.c279 switch (p->Op2) { in access_gic_sgi()
723 if (!(p->Op2 & 1)) in access_pmceid()
757 if (r->Op2 == 2) { in access_pmu_evcntr()
764 } else if (r->Op2 == 0) { in access_pmu_evcntr()
784 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
815 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
820 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
857 if (r->Op2 & 0x1) { in access_pmcnten()
889 if (r->Op2 & 0x1) in access_pminten()
1035 (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); in read_id_reg()
[all …]
Dsys_regs.h30 u8 Op2; member
43 u8 Op2; member
70 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_instr()
118 return i1->Op2 - i2->Op2; in cmp_sys_reg()
130 #define Op2(_x) .Op2 = _x macro
135 Op2(sys_reg_Op2(reg))
Dsys_regs_generic_v8.c60 { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
Dvgic-sys-reg-v3.c211 u8 idx = r->Op2 & 3; in access_gic_aprn()
/Linux-v4.19/arch/arm/include/asm/
Dcp15.h53 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
54 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
/Linux-v4.19/Documentation/virtual/kvm/devices/
Darm-vgic-v3.txt171 | Op 0 | Op1 | CRn | CRm | Op2 |