Lines Matching refs:Op2
279 switch (p->Op2) { in access_gic_sgi()
723 if (!(p->Op2 & 1)) in access_pmceid()
757 if (r->Op2 == 2) { in access_pmu_evcntr()
764 } else if (r->Op2 == 0) { in access_pmu_evcntr()
784 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evcntr()
815 if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) { in access_pmu_evtyper()
820 idx = ((r->CRm & 3) << 3) | (r->Op2 & 7); in access_pmu_evtyper()
857 if (r->Op2 & 0x1) { in access_pmcnten()
889 if (r->Op2 & 0x1) in access_pminten()
1035 (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); in read_id_reg()
1157 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
1531 { Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \
1533 { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n }, \
1535 { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n }, \
1537 { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
1540 { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n }
1549 { Op1( 0), CRn( 0), CRm( 0), Op2( 0), trap_dbgidr },
1551 { Op1( 0), CRn( 0), CRm( 0), Op2( 2), trap_raz_wi },
1555 { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
1558 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32 },
1560 { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32 },
1563 { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
1565 { Op1( 0), CRn( 0), CRm( 3), Op2( 2), trap_raz_wi },
1570 { Op1( 0), CRn( 0), CRm( 6), Op2( 0), trap_raz_wi },
1572 { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
1575 { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32 },
1587 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), trap_raz_wi },
1591 { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi },
1594 { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1 },
1598 { Op1( 0), CRn( 1), CRm( 3), Op2( 4), trap_raz_wi },
1601 { Op1( 0), CRn( 1), CRm( 4), Op2( 4), trap_raz_wi },
1615 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), trap_raz_wi },
1618 { Op1( 0), CRn( 7), CRm( 0), Op2( 7), trap_raz_wi },
1620 { Op1( 0), CRn( 7), CRm( 1), Op2( 7), trap_raz_wi },
1622 { Op1( 0), CRn( 7), CRm( 2), Op2( 7), trap_raz_wi },
1624 { Op1( 0), CRn( 7), CRm( 8), Op2( 6), trap_raz_wi },
1626 { Op1( 0), CRn( 7), CRm( 9), Op2( 6), trap_raz_wi },
1628 { Op1( 0), CRn( 7), CRm(14), Op2( 6), trap_dbgauthstatus_el1 },
1644 CRm((0b1000 | (((n) >> 3) & 0x3))), Op2(((n) & 0x7)), \
1651 CRm((0b1100 | (((n) >> 3) & 0x3))), Op2(((n) & 0x7)), \
1660 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, c1_SCTLR },
1661 { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
1662 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 },
1663 { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR },
1664 { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR },
1665 { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
1666 { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR },
1667 { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, c5_ADFSR },
1668 { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, c5_AIFSR },
1669 { Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL, c6_DFAR },
1670 { Op1( 0), CRn( 6), CRm( 0), Op2( 2), access_vm_reg, NULL, c6_IFAR },
1675 { Op1( 0), CRn( 7), CRm( 6), Op2( 2), access_dcsw },
1676 { Op1( 0), CRn( 7), CRm(10), Op2( 2), access_dcsw },
1677 { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw },
1680 { Op1( 0), CRn( 9), CRm(12), Op2( 0), access_pmcr },
1681 { Op1( 0), CRn( 9), CRm(12), Op2( 1), access_pmcnten },
1682 { Op1( 0), CRn( 9), CRm(12), Op2( 2), access_pmcnten },
1683 { Op1( 0), CRn( 9), CRm(12), Op2( 3), access_pmovs },
1684 { Op1( 0), CRn( 9), CRm(12), Op2( 4), access_pmswinc },
1685 { Op1( 0), CRn( 9), CRm(12), Op2( 5), access_pmselr },
1686 { Op1( 0), CRn( 9), CRm(12), Op2( 6), access_pmceid },
1687 { Op1( 0), CRn( 9), CRm(12), Op2( 7), access_pmceid },
1688 { Op1( 0), CRn( 9), CRm(13), Op2( 0), access_pmu_evcntr },
1689 { Op1( 0), CRn( 9), CRm(13), Op2( 1), access_pmu_evtyper },
1690 { Op1( 0), CRn( 9), CRm(13), Op2( 2), access_pmu_evcntr },
1691 { Op1( 0), CRn( 9), CRm(14), Op2( 0), access_pmuserenr },
1692 { Op1( 0), CRn( 9), CRm(14), Op2( 1), access_pminten },
1693 { Op1( 0), CRn( 9), CRm(14), Op2( 2), access_pminten },
1694 { Op1( 0), CRn( 9), CRm(14), Op2( 3), access_pmovs },
1696 { Op1( 0), CRn(10), CRm( 2), Op2( 0), access_vm_reg, NULL, c10_PRRR },
1697 { Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, c10_NMRR },
1698 { Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, c10_AMAIR0 },
1699 { Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 },
1702 { Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre },
1704 { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },
1707 { Op1( 0), CRn(14), CRm( 2), Op2( 0), access_cntp_tval },
1709 { Op1( 0), CRn(14), CRm( 2), Op2( 1), access_cntp_ctl },
1776 { Op1(0), CRn(14), CRm(15), Op2(7), access_pmu_evtyper },
1780 { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
1781 { Op1( 0), CRn( 0), CRm( 9), Op2( 0), access_pmu_evcntr },
1782 { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI1R */
1783 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, c2_TTBR1 },
1784 { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */
1785 { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */
1786 { Op1( 2), CRn( 0), CRm(14), Op2( 0), access_cntp_cval },
1822 val |= (x)->Op2; \
1944 params.Op2 = 0; in kvm_handle_cp_64()
2001 params.Op2 = (hsr >> 17) & 0x7; in kvm_handle_cp_32()
2104 params.Op2 = (esr >> 17) & 0x7; in kvm_handle_sys_reg()
2140 params->Op2 = ((id & KVM_REG_ARM64_SYSREG_OP2_MASK) in index_to_params()
2422 (reg->Op2 << KVM_REG_ARM64_SYSREG_OP2_SHIFT)); in sys_reg_to_index()