Searched refs:OMAP2_L4_IO_ADDRESS (Results 1 – 25 of 26) sorted by relevance
12
428 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); in omap2420_init_early()452 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); in omap2430_init_early()480 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); in omap3_init_early()533 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); in ti814x_init_early()549 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); in ti816x_init_early()612 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); in omap4430_init_early()613 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); in omap4430_init_early()640 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); in omap5_init_early()641 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); in omap5_init_early()666 OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); in dra7xx_init_early()[all …]
23 OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))25 OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))27 OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))32 OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))34 OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))36 OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))362 #define OMAP343X_SCRATCHPAD_REGADDR(reg) OMAP2_L4_IO_ADDRESS(\
23 OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))25 OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
24 OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))26 OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
30 OMAP2_L4_IO_ADDRESS(DRA7XX_PRCM_MPU_BASE + (inst) + (reg))
30 OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE + (inst) + (reg))
23 OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
33 OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg))
25 OMAP2_L4_IO_ADDRESS(OMAP4_SCRM_BASE + (reg))
25 OMAP2_L4_IO_ADDRESS(OMAP5_SCRM_BASE + (reg))
24 OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
232 writel_relaxed(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4)); in omap3_ctrl_write_boot_mode()292 v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); in omap3_clear_scratchpad_contents()402 scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD); in omap3_save_scratchpad_contents()
37 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ macro
29 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE + (inst) + (reg))
32 OMAP2_L4_IO_ADDRESS(OMAP4430_CM1_BASE + (inst) + (reg))
293 cfg.scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); in omap4_smp_init_cpus()
30 OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE + (inst) + (reg))
139 .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)236 .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
139 .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)236 .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
30 OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE + (inst) + (reg))
28 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE + (inst) + (reg))
32 OMAP2_L4_IO_ADDRESS(DRA7XX_PRM_BASE + (inst) + (reg))
32 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE + (inst) + (reg))
29 OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_BASE + (inst) + (reg))
664 writel_relaxed(val, OMAP2_L4_IO_ADDRESS(OMAP4_CTRL_MODULE_PAD_WKUP + in omap4_vc_i2c_timing_init()
