Searched refs:Number (Results 1 – 25 of 355) sorted by relevance
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215 Cookies idx=N Number of index cookies allocated216 dat=N Number of data storage cookies allocated217 spc=N Number of special cookies allocated218 Objects alc=N Number of objects allocated219 nal=N Number of object allocation failures220 avl=N Number of objects that reached the available state221 ded=N Number of objects that reached the dead state222 ChkAux non=N Number of objects that didn't have a coherency check223 ok=N Number of objects that passed a coherency check224 upd=N Number of objects that needed a coherency data update[all …]
2 # Hardware Random Number Generator (RNG) configuration6 tristate "Hardware Random Number Generator Core support"9 Hardware Random Number Generator Core infrastructure.24 tristate "Timer IOMEM HW Random Number Generator support"28 Number Generator used by reading a 'dumb' iomem address that38 tristate "Intel HW Random Number Generator support"42 This driver provides kernel-side support for the Random Number51 tristate "AMD HW Random Number Generator support"55 This driver provides kernel-side support for the Random Number64 tristate "Atmel Random Number Generator support"[all …]
126 idles: (RO) Number of times the interface was129 watchdog_pretimeouts: (RO) Number of watchdog pretimeouts.131 complete_transactions: (RO) Number of completed messages.133 events: (RO) Number of IPMI events received from136 interrupts: (RO) Number of interrupts the driver139 hosed_count: (RO) Number of times the hardware didn't142 long_timeouts: (RO) Number of times the driver146 flag_fetches: (RO) Number of times the driver149 attentions: (RO) Number of time the driver got an152 incoming_messages: (RO) Number of asynchronous messages[all …]
39 Number of flush requests from the frontend.46 Number of requests delayed because the backend was too54 Number of read requests from the frontend.61 Number of sectors read by the frontend.68 Number of write requests from the frontend.75 Number of sectors written by the frontend.
12 Description: Number of seconds the SCSI layer will wait after a transport21 Description: Number of seconds the SCSI layer will wait after a transport37 Description: Number of seconds the SCSI layer will wait after a reconnect
10 a Random Number Generator (RNG). The software has two parts:54 Hardware driver for Intel/AMD/VIA Random Number Generators (RNG)62 The Firmware Hub integrates a Random Number Generator (RNG)94 May 1999 Order Number: 290658-002 R97 Random Number Generator99 December 1999 Order Number: 298029-001 R101 Intel 82802 Firmware HUB Random Number Generator Driver
64 word Number; member211 word Number; member301 word Number; member308 word Number; member314 word Number; member321 word Number; member328 word Number; member334 word Number; member
56 - nvidia,snor-muxed-width: Number of cycles MUX address/data asserted on the58 - nvidia,snor-hold-width: Number of cycles CE stays asserted after the61 - nvidia,snor-adv-width: Number of cycles during which ADV stays asserted.63 - nvidia,snor-ce-width: Number of cycles before CE is asserted.65 - nvidia,snor-we-width: Number of cycles during which WE stays asserted.67 - nvidia,snor-oe-width: Number of cycles during which OE stays asserted.69 - nvidia,snor-wait-width: Number of cycles before READY is asserted.
1 Random Number Algorithm Definitions7 Crypto API Random Number API
6 - #pwm-cells : Number of cells used to specify a PWM. First cell22 - st,pwm-num-chan: Number of available PWM channels. Default is 0.23 - st,capture-num-chan: Number of available Capture channels. Default is 0.
6 - #lines : Number of lines on the operator panel e.g. <0x2>.7 - #length : Number of characters per line of the operator panel e.g. <0x10>.
30 1E8/001 ALL e820_entries Number of entries in e820_table (below)31 1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)32 1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer
8 - #address-cells = <1>; : Number of address cells in child10 - #size-cells = <0>; : Number of size cells in child nodes.
36 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise40 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall44 - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall
44 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C48 Number of nanoseconds the IP core additionally needs to setup SCL.51 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C55 Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
7 - dma-channels: Number of channels supported by hardware8 - dma-requests: Number of DMA request lines supported, up to 169 - dma-masters: Number of AHB masters supported by the controller
61 unsigned short nr_phys_segments DB Number of physical scatter gather64 unsigned short nr_hw_segments DB Number of hardware scatter gather67 unsigned int current_nr_sectors DB Number of sectors in first segment
18 Number of frequency points (steps) in the frequency sweep.27 Number of output excitation cycles (settling time cycles)
9 -- PRNG: Pseudo Random Number Generator15 -- True Random Number Generator (TRNG)
227 #used metadata blocks : Number of metadata blocks used231 #used cache blocks : Number of blocks resident in the cache233 #read hits : Number of times a READ bio has been mapped235 #read misses : Number of times a READ bio has been mapped237 #write hits : Number of times a WRITE bio has been mapped239 #write misses : Number of times a WRITE bio has been241 #demotions : Number of times a block has been removed243 #promotions : Number of times a block has been moved to245 #dirty : Number of blocks in the cache that differ247 #feature args : Number of feature args to follow[all …]
27 Number of partitions per device (default: 0).30 Number of block devices that should be initialized (default: 16).
14 - keypad,num-rows: Number of row lines connected to the keypad controller.15 - keypad,num-columns: Number of column lines connected to the keypad
12 - #address-cells: Number of address cells14 - #pinctrl-cells: Number of pinctrl cells, must be 2. See also
17 - nand-ecc-strength: Number of bits to correct per ECC step.18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
47 int "Number of minors per block device"52 Number of minors per block device. One is needed for every55 Number of total MMC minors available is 256, so your number
