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Searched refs:MLX5_CAP_GEN (Results 1 – 25 of 48) sorted by relevance

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/Linux-v4.19/drivers/net/ethernet/mellanox/mlx5/core/
Dfw.c125 if (MLX5_CAP_GEN(dev, eth_net_offloads)) { in mlx5_query_hca_caps()
131 if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { in mlx5_query_hca_caps()
137 if (MLX5_CAP_GEN(dev, pg)) { in mlx5_query_hca_caps()
143 if (MLX5_CAP_GEN(dev, atomic)) { in mlx5_query_hca_caps()
149 if (MLX5_CAP_GEN(dev, roce)) { in mlx5_query_hca_caps()
155 if (MLX5_CAP_GEN(dev, nic_flow_table) || in mlx5_query_hca_caps()
156 MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { in mlx5_query_hca_caps()
162 if (MLX5_CAP_GEN(dev, vport_group_manager) && in mlx5_query_hca_caps()
175 if (MLX5_CAP_GEN(dev, vector_calc)) { in mlx5_query_hca_caps()
181 if (MLX5_CAP_GEN(dev, qos)) { in mlx5_query_hca_caps()
[all …]
Dvport.c275 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) : in mlx5_query_nic_vport_mac_list()
276 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list); in mlx5_query_nic_vport_mac_list()
335 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) : in mlx5_modify_nic_vport_mac_list()
336 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list); in mlx5_modify_nic_vport_mac_list()
390 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list); in mlx5_query_nic_vport_vlans()
448 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list); in mlx5_modify_nic_vport_vlans()
538 if (!MLX5_CAP_GEN(mdev, vport_group_manager)) in mlx5_modify_nic_vport_node_guid()
596 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager); in mlx5_query_hca_vport_gid()
597 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size)); in mlx5_query_hca_vport_gid()
630 if (MLX5_CAP_GEN(dev, num_ports) == 2) in mlx5_query_hca_vport_gid()
[all …]
Dmlx5_core.h191 #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
192 MLX5_CAP_GEN((mdev), pps_modify) && \
208 return MLX5_CAP_GEN(dev, vport_group_manager) && in mlx5_lag_is_lacp_owner()
209 (MLX5_CAP_GEN(dev, num_lag_ports) > 1) && in mlx5_lag_is_lacp_owner()
210 MLX5_CAP_GEN(dev, lag_master); in mlx5_lag_is_lacp_owner()
Duar.c67 if (MLX5_CAP_GEN(mdev, uar_4k)) in uars_per_sys_page()
68 return MLX5_CAP_GEN(mdev, num_of_uars_per_page); in uars_per_sys_page()
77 if (MLX5_CAP_GEN(mdev, uar_4k)) in uar2pfn()
203 (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET; in map_offset()
283 bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size); in addr_to_dbi_in_syspage()
Den_dcbnl.c52 #define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg) && \
84 if (!MLX5_CAP_GEN(priv->mdev, dcbx)) in mlx5e_dcbnl_switch_to_host_mode()
109 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_dcbnl_ieee_getets()
318 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_dcbnl_ieee_setets()
414 if ((!mode) && MLX5_CAP_GEN(priv->mdev, dcbx)) { in mlx5e_dcbnl_setdcbx()
446 if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) || in mlx5e_dcbnl_ieee_setapp()
499 if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) || in mlx5e_dcbnl_ieee_delapp()
621 if (!MLX5_CAP_GEN(mdev, ets)) in mlx5e_dcbnl_setall()
730 if (!MLX5_CAP_GEN(priv->mdev, ets)) { in mlx5e_dcbnl_getpgtccfgtx()
1035 if (!MLX5_CAP_GEN(priv->mdev, ets)) in mlx5e_ets_init()
[all …]
Den_ethtool.c394 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation)) in mlx5e_ethtool_get_coalesce()
453 if (!MLX5_CAP_GEN(mdev, cq_moderation)) in mlx5e_ethtool_set_coalesce()
1112 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) || in mlx5e_ethtool_get_ts_info()
1141 if (MLX5_CAP_GEN(mdev, wol_g)) in mlx5e_get_wol_supported()
1144 if (MLX5_CAP_GEN(mdev, wol_s)) in mlx5e_get_wol_supported()
1147 if (MLX5_CAP_GEN(mdev, wol_a)) in mlx5e_get_wol_supported()
1150 if (MLX5_CAP_GEN(mdev, wol_b)) in mlx5e_get_wol_supported()
1153 if (MLX5_CAP_GEN(mdev, wol_m)) in mlx5e_get_wol_supported()
1156 if (MLX5_CAP_GEN(mdev, wol_u)) in mlx5e_get_wol_supported()
1159 if (MLX5_CAP_GEN(mdev, wol_p)) in mlx5e_get_wol_supported()
[all …]
Deq.c844 if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && in mlx5_start_eqs()
845 MLX5_CAP_GEN(dev, general_notification_event)) in mlx5_start_eqs()
848 if (MLX5_CAP_GEN(dev, port_module_event)) in mlx5_start_eqs()
856 if (MLX5_CAP_GEN(dev, fpga)) in mlx5_start_eqs()
862 if (MLX5_CAP_GEN(dev, temp_warn_event)) in mlx5_start_eqs()
897 if (MLX5_CAP_GEN(dev, pg)) { in mlx5_start_eqs()
933 if (MLX5_CAP_GEN(dev, pg)) { in mlx5_stop_eqs()
987 if (MLX5_CAP_GEN(dev, pg)) in mlx5_core_eq_free_irqs()
Dmain.c217 if (!MLX5_CAP_GEN(dev, driver_version)) in mlx5_set_driver_version()
326 int num_eqs = MLX5_CAP_GEN(dev, max_num_eqs) ? in mlx5_alloc_irq_vectors()
327 MLX5_CAP_GEN(dev, max_num_eqs) : in mlx5_alloc_irq_vectors()
328 1 << MLX5_CAP_GEN(dev, log_max_eq); in mlx5_alloc_irq_vectors()
332 nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + in mlx5_alloc_irq_vectors()
475 if (MLX5_CAP_GEN(dev, atomic)) { in handle_hca_cap_atomic()
528 mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), in handle_hca_cap()
601 if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) in mlx5_core_set_hca_defaults()
1599 if (!MLX5_CAP_GEN(dev, force_teardown)) { in mlx5_try_fast_unload()
Deswitch_offloads.c88 MLX5_CAP_GEN(attr->out_mdev[j], vhca_id); in mlx5_eswitch_add_offloaded_rule()
110 MLX5_CAP_GEN(attr->in_mdev, vhca_id)); in mlx5_eswitch_add_offloaded_rule()
163 MLX5_CAP_GEN(attr->out_mdev[i], vhca_id); in mlx5_eswitch_add_fwd_rule()
176 MLX5_CAP_GEN(attr->in_mdev, vhca_id)); in mlx5_eswitch_add_fwd_rule()
511 u32 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) | in esw_create_offloads_fast_fdb_table()
512 MLX5_CAP_GEN(dev, max_flow_counter_15_0); in esw_create_offloads_fast_fdb_table()
1085 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in mlx5_devlink_eswitch_check()
1207 if (!MLX5_CAP_GEN(dev, vport_group_manager)) in mlx5_eswitch_inline_mode_get()
Deswitch.h47 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
50 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
Dlag.c497 if (!MLX5_CAP_GEN(dev, vport_group_manager) || in mlx5_lag_add()
498 !MLX5_CAP_GEN(dev, lag_master) || in mlx5_lag_add()
499 (MLX5_CAP_GEN(dev, num_lag_ports) != MLX5_MAX_PORTS)) in mlx5_lag_add()
Den_stats.c293 return MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard) ? in mlx5e_grp_vnic_env_get_num_stats()
302 if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) in mlx5e_grp_vnic_env_fill_strings()
316 if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) in mlx5e_grp_vnic_env_fill_stats()
332 if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) in mlx5e_grp_vnic_env_update_stats()
913 if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in mlx5e_query_pfc_combined()
928 if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in mlx5e_query_global_pause_combined()
Deswitch.c1314 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) in esw_create_tsar()
1358 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) || in esw_vport_enable_qos()
1418 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling)) in esw_vport_qos_config()
1807 if (!MLX5_CAP_GEN(esw->dev, vport_group_manager)) in mlx5_eswitch_set_vport_mac()
1884 if (!MLX5_CAP_GEN(esw->dev, vport_group_manager)) in mlx5_eswitch_get_vport_config()
2118 if (!MLX5_CAP_GEN(dev, receive_discard_vport_down) && in mlx5_eswitch_query_vport_drop_stats()
2119 !MLX5_CAP_GEN(dev, transmit_discard_vport_down)) in mlx5_eswitch_query_vport_drop_stats()
2128 if (MLX5_CAP_GEN(dev, receive_discard_vport_down)) in mlx5_eswitch_query_vport_drop_stats()
2130 if (MLX5_CAP_GEN(dev, transmit_discard_vport_down)) in mlx5_eswitch_query_vport_drop_stats()
/Linux-v4.19/drivers/infiniband/hw/mlx5/
Dmain.c136 int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type); in mlx5_ib_port_link_layer()
428 props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg); in mlx5_query_port_roce()
538 if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB) in mlx5_use_mad_ifc()
539 return !MLX5_CAP_GEN(dev->mdev, ib_virt); in mlx5_use_mad_ifc()
650 *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, in mlx5_query_max_pkeys()
733 u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); in mlx5_ib_query_device()
770 if (MLX5_CAP_GEN(mdev, pkv)) in mlx5_ib_query_device()
772 if (MLX5_CAP_GEN(mdev, qkv)) in mlx5_ib_query_device()
774 if (MLX5_CAP_GEN(mdev, apm)) in mlx5_ib_query_device()
776 if (MLX5_CAP_GEN(mdev, xrc)) in mlx5_ib_query_device()
[all …]
Dib_rep.c70 ibdev->num_ports = max(MLX5_CAP_GEN(dev, num_ports), in mlx5_ib_vport_rep_load()
71 MLX5_CAP_GEN(dev, num_vhca_ports)); in mlx5_ib_vport_rep_load()
Dcq.c768 if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index)) in mini_cqe_res_format_to_hw()
844 MLX5_CAP_GEN(dev->mdev, cqe_compression_128)) || in create_cq_user()
846 MLX5_CAP_GEN(dev->mdev, cqe_compression)))) { in create_cq_user()
869 !MLX5_CAP_GEN(dev->mdev, cqe_128_always)) { in create_cq_user()
997 (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))) in mlx5_ib_create_cq()
1004 if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) in mlx5_ib_create_cq()
1186 if (!MLX5_CAP_GEN(dev->mdev, cq_moderation)) in mlx5_ib_modify_cq()
1340 if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) { in mlx5_ib_resize_cq()
1346 entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) { in mlx5_ib_resize_cq()
1349 1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)); in mlx5_ib_resize_cq()
[all …]
Dqp.c251 if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) in set_rq_size()
277 if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { in set_rq_size()
280 MLX5_CAP_GEN(dev->mdev, in set_rq_size()
404 if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { in calc_sq_size()
406 wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); in calc_sq_size()
419 if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { in calc_sq_size()
423 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); in calc_sq_size()
446 if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { in set_user_buf_size()
448 desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); in set_user_buf_size()
460 if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { in set_user_buf_size()
[all …]
Dsrq.c147 if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 && in create_srq_user()
207 if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 && in create_srq_kernel()
248 __u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); in mlx5_ib_create_srq()
314 MLX5_CAP_GEN(dev->mdev, log_tag_matching_list_sz)) { in mlx5_ib_create_srq()
Dodp.c256 if (!MLX5_CAP_GEN(dev->mdev, pg)) in mlx5_ib_internal_fill_odp_caps()
261 if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) in mlx5_ib_internal_fill_odp_caps()
284 if (MLX5_CAP_GEN(dev->mdev, fixed_buffer_size) && in mlx5_ib_internal_fill_odp_caps()
285 MLX5_CAP_GEN(dev->mdev, null_mkey) && in mlx5_ib_internal_fill_odp_caps()
286 MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) in mlx5_ib_internal_fill_odp_caps()
677 if (depth >= MLX5_CAP_GEN(dev->mdev, max_indirection)) { in pagefault_single_data_segment()
Dcong.c406 if (!MLX5_CAP_GEN(mdev, cc_query_allowed) || in mlx5_ib_init_cong_debugfs()
407 !MLX5_CAP_GEN(mdev, cc_modify_allowed)) in mlx5_ib_init_cong_debugfs()
/Linux-v4.19/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dgid.c136 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH) in mlx5_core_roce_gid_set()
151 if (MLX5_CAP_GEN(dev, num_vhca_ports) > 0) in mlx5_core_roce_gid_set()
Dmpfs.c99 int l2table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table); in mlx5_mpfs_init()
/Linux-v4.19/drivers/net/ethernet/mellanox/mlx5/core/en/
Dport_buffer.h42 #define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \
/Linux-v4.19/include/linux/mlx5/
Deswitch.h11 #define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
Ddriver.h1273 (MLX5_CAP_GEN(mdev, vport_group_manager) && \
1274 (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && \
1294 return MLX5_CAP_GEN(dev, affiliate_nic_vport_criteria) && in mlx5_core_is_mp_slave()
1295 MLX5_CAP_GEN(dev, num_vhca_ports) <= 1; in mlx5_core_is_mp_slave()
1300 return MLX5_CAP_GEN(dev, num_vhca_ports) > 1; in mlx5_core_is_mp_master()
1314 return MLX5_CAP_GEN(dev, native_port_num); in mlx5_core_native_port_num()

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