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Searched refs:IS_HASWELL (Results 1 – 25 of 27) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_psr.c353 if (IS_HASWELL(dev_priv)) in hsw_activate_psr1()
491 if (IS_HASWELL(dev_priv) && in intel_psr_compute_config()
498 if (IS_HASWELL(dev_priv) && in intel_psr_compute_config()
555 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_enable_source()
953 dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ? in intel_psr_init()
967 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_init()
Dintel_pipe_crc.c369 if (IS_HASWELL(dev_priv)) { in hsw_pipe_A_crc_wa()
409 if (set_wa && (IS_HASWELL(dev_priv) || in ivb_pipe_crc_ctl_reg()
505 else if ((IS_HASWELL(dev_priv) || in intel_crtc_set_crc_source()
Di915_drv.c147 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
152 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
157 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
163 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
225 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_virt_detect_pch()
1642 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_drm_suspend_late()
1839 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i915_drm_resume_early()
2614 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_runtime_suspend()
2702 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_runtime_resume()
Dintel_hdcp.c51 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in hdcp_key_loadable()
97 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_hdcp_load_keys()
733 return ((INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) && in is_hdcp_supported()
Dintel_color.c149 if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) in ilk_load_csc_matrix()
376 if (IS_HASWELL(dev_priv) && intel_crtc_state->ips_enabled && in haswell_load_luts()
654 } else if (IS_HASWELL(dev_priv)) { in intel_color_init()
Dintel_fbc.c336 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in gen7_fbc_activate()
629 if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) { in intel_fbc_hw_tracking_covers_screen()
661 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_fbc_update_state_cache()
752 if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && in intel_fbc_can_activate()
Di915_cmd_parser.c873 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
882 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
898 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
906 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
Dintel_ddi.c718 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_dp()
738 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_edp()
754 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_fdi()
772 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_hdmi()
937 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_hdmi_level()
1772 if (IS_HASWELL(dev_priv) && in intel_ddi_enable_transcoder_func()
Di915_drv.h2362 #define IS_HASWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_HASWELL) macro
2372 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
2383 #define IS_HSW_ULT(dev_priv) (IS_HASWELL(dev_priv) && \
2385 #define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
2523 #define HAS_WT(dev_priv) ((IS_HASWELL(dev_priv) || \
Dintel_display.c3227 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i9xx_plane_ctl()
3290 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
3353 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_update_plane()
5019 if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)) in ironlake_pfit_enable()
5744 if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) { in haswell_crtc_enable()
6386 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ironlake_check_fdi_lanes()
7325 if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP && in intel_set_pipe_timings()
7759 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_get_initial_plane_config()
8418 if (IS_HASWELL(dev_priv) && intel_crtc->config->dither) in haswell_set_pipeconf()
8989 if (IS_HASWELL(dev_priv)) in assert_can_disable_lcpll()
[all …]
Dintel_pm.c2877 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_read_wm_latency()
2927 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_max_level()
3101 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_compute_pipe_wm()
3292 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_lp_latency()
3516 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_write_wm_values()
5562 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_pipe_wm_get_hw_state()
6030 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_get_hw_state()
6435 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in gen6_set_rps()
6782 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv) || in gen6_init_rps_frequencies()
7158 } else if (IS_HASWELL(dev_priv)) { in gen6_update_ring_freq()
[all …]
Dintel_cdclk.c2152 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pixel_rate_to_cdclk()
2555 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_compute_max_dotclk()
2819 else if (IS_HASWELL(dev_priv)) in intel_init_cdclk_hooks()
Dintel_sprite.c649 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_sprite_ctl()
742 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_update_plane()
Di915_perf.c2674 if (IS_HASWELL(dev_priv) && specific_ctx) in i915_perf_open_ioctl_locked()
2976 if (IS_HASWELL(dev_priv)) { in i915_perf_register()
3486 if (IS_HASWELL(dev_priv)) { in i915_perf_init()
Dintel_device_info.c841 if (IS_HASWELL(dev_priv)) in intel_device_info_runtime_init()
Dintel_audio.c719 } else if (IS_HASWELL(dev_priv) || INTEL_GEN(dev_priv) >= 8) { in intel_init_audio_hooks()
Dintel_ringbuffer.c1540 if (IS_HASWELL(i915)) in mi_set_context()
2225 if (IS_HASWELL(dev_priv)) in intel_init_render_ring_buffer()
Dintel_uncore.c450 if (IS_HASWELL(dev_priv) || in intel_uncore_edram_detect()
1449 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_uncore_fw_domains_init()
Dintel_engine_cs.c211 if (IS_HASWELL(dev_priv)) in __intel_engine_context_size()
Di915_gem_gtt.c1819 if (IS_HASWELL(dev_priv)) { in gen7_ppgtt_enable()
3478 else if (IS_HASWELL(dev_priv)) in gen6_gmch_probe()
Di915_irq.c3549 if (IS_HASWELL(dev_priv)) { in ironlake_irq_reset()
4043 if (IS_HASWELL(dev_priv)) { in ironlake_irq_postinstall()
Dintel_hdmi.c1483 else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) in intel_hdmi_source_max_tmds_clock()
Di915_debugfs.c1142 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_frequency_info()
2728 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i915_edp_psr_status()
Dintel_dp.c312 } else if ((IS_HASWELL(dev_priv) && !IS_HSW_ULX(dev_priv)) || in intel_dp_set_source_rates()
1516 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_dp_aux_init()
Dintel_runtime_pm.c2860 } else if (IS_HASWELL(dev_priv)) { in intel_power_domains_init()

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