Searched refs:IMX7D_PLL_SYS_MAIN_240M_CLK (Results 1 – 7 of 7) sorted by relevance
257 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;265 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;274 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
370 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;378 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
118 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
191 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
338 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
26 #define IMX7D_PLL_SYS_MAIN_240M_CLK 13 macro
471 …clks[IMX7D_PLL_SYS_MAIN_240M_CLK] = imx_clk_gate_dis("pll_sys_main_240m_clk", "pll_sys_main_240m",… in imx7d_clocks_init()
