Searched refs:IMX6SLL_CLK_PLL3_USB_OTG (Results 1 – 3 of 3) sorted by relevance
37 #define IMX6SLL_CLK_PLL3_USB_OTG 26 macro
133 clks[IMX6SLL_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); in imx6sll_clocks_init()340 clk_set_parent(clks[IMX6SLL_CLK_PERIPH_CLK2_SEL], clks[IMX6SLL_CLK_PLL3_USB_OTG]); in imx6sll_clocks_init()
121 clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
