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Searched refs:FACTOR (Results 1 – 18 of 18) sorted by relevance

/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt8135.c28 FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1),
29 FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1),
30 FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1),
31 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1),
35 FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2),
36 FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3),
37 FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5),
38 FACTOR(CLK_TOP_MAINPLL_230P3M, "mainpll_230p3m", "mainpll", 1, 7),
40 FACTOR(CLK_TOP_UNIVPLL_624M, "univpll_624m", "univpll", 1, 2),
41 FACTOR(CLK_TOP_UNIVPLL_416M, "univpll_416m", "univpll", 1, 3),
[all …]
Dclk-mt2712.c47 FACTOR(CLK_TOP_SYS_26M, "sys_26m", "clk26m", 1,
49 FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "sys_26m", 1,
54 FACTOR(CLK_TOP_ARMCA35PLL, "armca35pll_ck", "armca35pll", 1,
56 FACTOR(CLK_TOP_ARMCA35PLL_600M, "armca35pll_600m", "armca35pll_ck", 1,
58 FACTOR(CLK_TOP_ARMCA35PLL_400M, "armca35pll_400m", "armca35pll_ck", 1,
60 FACTOR(CLK_TOP_ARMCA72PLL, "armca72pll_ck", "armca72pll", 1,
62 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1,
64 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1,
66 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1,
68 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1,
[all …]
Dclk-mt2701.c66 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
67 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
68 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
69 FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5),
70 FACTOR(CLK_TOP_SYSPLL_D7, "syspll_d7", "mainpll", 1, 7),
71 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
72 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
73 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
74 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
75 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
[all …]
Dclk-mt6797.c34 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, 1),
35 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
36 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
37 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
38 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
39 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
40 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
41 FACTOR(CLK_TOP_SYSPLL_D3_D3, "syspll_d3_d3", "syspll_d3", 1, 3),
42 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
43 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
[all …]
Dclk-mt8173.c44 FACTOR(CLK_TOP_ARMCA7PLL_754M, "armca7pll_754m", "armca7pll", 1, 2),
45 FACTOR(CLK_TOP_ARMCA7PLL_502M, "armca7pll_502m", "armca7pll", 1, 3),
47 FACTOR(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2),
48 FACTOR(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3),
49 FACTOR(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5),
50 FACTOR(CLK_TOP_MAIN_H156M, "main_h156m", "mainpll", 1, 7),
52 FACTOR(CLK_TOP_TVDPLL_445P5M, "tvdpll_445p5m", "tvdpll", 1, 4),
53 FACTOR(CLK_TOP_TVDPLL_594M, "tvdpll_594m", "tvdpll", 1, 3),
55 FACTOR(CLK_TOP_UNIV_624M, "univ_624m", "univpll", 1, 2),
56 FACTOR(CLK_TOP_UNIV_416M, "univ_416m", "univpll", 1, 3),
[all …]
Dclk-mt7622.c396 FACTOR(CLK_TOP_TO_USB3_SYS, "to_usb3_sys", "eth1pll", 1, 4),
397 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),
398 FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125),
399 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),
400 FACTOR(CLK_TOP_TXCLK_SRC_PRE, "txclk_src_pre", "sgmiipll_d2", 1, 1),
401 FACTOR(CLK_TOP_RTC, "rtc", "clkxtal", 1, 1024),
402 FACTOR(CLK_TOP_MEMPLL, "mempll", "clkxtal", 32, 1),
403 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
404 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
405 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
[all …]
Dclk-mtk.h55 #define FACTOR(_id, _name, _parent, _mult, _div) { \ macro
/Linux-v4.19/drivers/clk/rockchip/
Dclk-rk3128.c209 FACTOR(PLL_GPLL_DIV2, "gpll_div2", "gpll", 0, 1, 2),
210 FACTOR(PLL_GPLL_DIV3, "gpll_div3", "gpll", 0, 1, 3),
222 FACTOR(SCLK_DDRC, "clk_ddrc", "ddrphy2x", 0, 1, 2),
223 FACTOR(0, "clk_ddrphy", "ddrphy2x", 0, 1, 2),
261 FACTOR(HCLK_VEPU, "hclk_vepu", "aclk_vepu", 0, 1, 4),
354 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3036.c183 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
195 FACTOR(0, "ddrphy", "ddrphy2x", 0, 1, 2),
362 FACTOR(0, "sclk_macref_out", "hclk_peri_src", 0, 1, 2),
Dclk-rv1108.c472 FACTOR(0, "sclk_cvbs_27m", "sclk_cvbs_host", 0, 1, 2),
506 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
683 FACTOR(0, "clk_ddr", "clk_ddrphy_src", 0, 1, 2),
Dclk-px30.c274 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
525 FACTOR(0, "clk_gmac_rx_tx_div2", "clk_gmac_rx_tx", 0, 1, 2),
526 FACTOR(0, "clk_gmac_rx_tx_div20", "clk_gmac_rx_tx", 0, 1, 20),
Dclk-rk3228.c423 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk.h700 #define FACTOR(_id, cname, pname, f, fm, fd) \ macro
Dclk-rk3188.c349 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3328.c704 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3368.c285 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3288.c340 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_panel.c222 #define FACTOR (1 << ACCURACY) in panel_fitter_scaling() macro
223 u32 ratio = source * FACTOR / target; in panel_fitter_scaling()
224 return (FACTOR * ratio + FACTOR/2) / FACTOR; in panel_fitter_scaling()