Searched refs:EXYNOS_DOUT_SRP (Results 1 – 7 of 7) sorted by relevance
42 <&clock_audss EXYNOS_DOUT_SRP>,74 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
35 <&clock_audss EXYNOS_DOUT_SRP>,66 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
137 <&clock_audss EXYNOS_DOUT_SRP>,
147 <&clock_audss EXYNOS_DOUT_SRP>,
103 <&clock_audss EXYNOS_DOUT_SRP>,
15 #define EXYNOS_DOUT_SRP 2 macro
111 for (i = EXYNOS_MOUT_AUDSS; i < EXYNOS_DOUT_SRP; i++) { in exynos_audss_clk_teardown()206 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", in exynos_audss_clk_probe()