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Searched refs:DPU_MAX_PLANES (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_util.h113 int32_t init_phase_x[DPU_MAX_PLANES];
114 int32_t phase_step_x[DPU_MAX_PLANES];
115 int32_t init_phase_y[DPU_MAX_PLANES];
116 int32_t phase_step_y[DPU_MAX_PLANES];
118 u32 preload_x[DPU_MAX_PLANES];
119 u32 preload_y[DPU_MAX_PLANES];
120 u32 src_width[DPU_MAX_PLANES];
121 u32 src_height[DPU_MAX_PLANES];
179 int32_t num_ext_pxls_lr[DPU_MAX_PLANES];
180 int32_t num_ext_pxls_tb[DPU_MAX_PLANES];
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Ddpu_hw_sspp.h111 int init_phase_x[DPU_MAX_PLANES];
112 int phase_step_x[DPU_MAX_PLANES];
113 int init_phase_y[DPU_MAX_PLANES];
114 int phase_step_y[DPU_MAX_PLANES];
121 int num_ext_pxls_left[DPU_MAX_PLANES];
122 int num_ext_pxls_right[DPU_MAX_PLANES];
123 int num_ext_pxls_top[DPU_MAX_PLANES];
124 int num_ext_pxls_btm[DPU_MAX_PLANES];
130 int left_ftch[DPU_MAX_PLANES];
131 int right_ftch[DPU_MAX_PLANES];
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Ddpu_hw_mdss.h37 #ifndef DPU_MAX_PLANES
38 #define DPU_MAX_PLANES 4 macro
389 u8 element[DPU_MAX_PLANES];
390 u8 bits[DPU_MAX_PLANES];
422 uint32_t plane_addr[DPU_MAX_PLANES];
423 uint32_t plane_size[DPU_MAX_PLANES];
424 uint32_t plane_pitch[DPU_MAX_PLANES];
Ddpu_formats.c771 for (i = 0; i < DPU_MAX_PLANES; i++) in _dpu_format_get_plane_sizes_ubwc()
838 for (i = 0; i < layout->num_planes && i < DPU_MAX_PLANES; ++i) { in _dpu_format_get_plane_sizes_linear()
843 for (i = 0; i < DPU_MAX_PLANES; i++) in _dpu_format_get_plane_sizes_linear()
999 uint32_t plane_addr[DPU_MAX_PLANES]; in dpu_format_populate_layout()
1021 for (i = 0; i < DPU_MAX_PLANES; ++i) in dpu_format_populate_layout()
Ddpu_hw_sspp.c364 for (color = 0; color < DPU_MAX_PLANES; color++) { in dpu_hw_sspp_setup_pe_config()
Ddpu_plane.c656 for (i = 0; i < DPU_MAX_PLANES; i++) { in _dpu_plane_setup_scaler3()