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Searched refs:DPIO_PHY0 (Results 1 – 8 of 8) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_runtime_pm.c1144 if (!dev_priv->chv_phy_assert[DPIO_PHY0]) in assert_chv_phy_status()
1145 phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1146 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1147 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1148 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1149 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1150 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1158 phy_status |= PHY_POWERGOOD(DPIO_PHY0); in assert_chv_phy_status()
1161 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) in assert_chv_phy_status()
1162 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
[all …]
Dintel_dpio_phy.c157 [DPIO_PHY0] = {
179 [DPIO_PHY0] = {
259 *phy = DPIO_PHY0; in bxt_port_to_phy_channel()
797 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
945 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
Dintel_display.h170 DPIO_PHY0, enumerator
Di915_drv.c786 DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; in intel_init_dpio()
789 DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; in intel_init_dpio()
Dintel_drv.h1211 return DPIO_PHY0; in vlv_dport_to_phy()
Di915_reg.h3236 #define PHY_POWERGOOD(phy) (((phy) == DPIO_PHY0) ? (1 << 31) : (1 << 30))
/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dhandlers.c1592 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in bxt_gt_disp_pwron_write()
1594 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |= in bxt_gt_disp_pwron_write()
3089 MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY0), D_BXT, in init_bxt_mmio_info()
3103 MMIO_D(BXT_PORT_CL1CM_DW0(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3104 MMIO_D(BXT_PORT_CL1CM_DW9(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3105 MMIO_D(BXT_PORT_CL1CM_DW10(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3106 MMIO_D(BXT_PORT_CL1CM_DW28(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3107 MMIO_D(BXT_PORT_CL1CM_DW30(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3108 MMIO_D(BXT_PORT_CL2CM_DW6(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3109 MMIO_D(BXT_PORT_REF_DW3(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
[all …]
Dmmio.c251 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()
255 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()