1144 	if (!dev_priv->chv_phy_assert[DPIO_PHY0])  in assert_chv_phy_status()
1145 		phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) |  in assert_chv_phy_status()
1146 				     PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) |  in assert_chv_phy_status()
1147 				     PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) |  in assert_chv_phy_status()
1148 				     PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) |  in assert_chv_phy_status()
1149 				     PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) |  in assert_chv_phy_status()
1150 				     PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1));  in assert_chv_phy_status()
1158 		phy_status |= PHY_POWERGOOD(DPIO_PHY0);  in assert_chv_phy_status()
1161 		if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0)  in assert_chv_phy_status()
1162 			phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0);  in assert_chv_phy_status()
1164 		if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0)  in assert_chv_phy_status()
1165 			phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1);  in assert_chv_phy_status()
1169 			     PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) |  in assert_chv_phy_status()
1170 			     PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)))  in assert_chv_phy_status()
1171 			phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0);  in assert_chv_phy_status()
1179 			     PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) &&  in assert_chv_phy_status()
1181 			phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1);  in assert_chv_phy_status()
1184 			     PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0)))  in assert_chv_phy_status()
1185 			phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0);  in assert_chv_phy_status()
1187 			     PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0)))  in assert_chv_phy_status()
1188 			phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1);  in assert_chv_phy_status()
1191 			     PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1)))  in assert_chv_phy_status()
1192 			phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0);  in assert_chv_phy_status()
1194 			     PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1)))  in assert_chv_phy_status()
1195 			phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1);  in assert_chv_phy_status()
1247 		phy = DPIO_PHY0;  in chv_dpio_cmn_power_well_enable()
1308 		phy = DPIO_PHY0;  in chv_dpio_cmn_power_well_disable()
1333 	enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C;  in assert_chv_phy_powergate()
2400 			.bxt.phy = DPIO_PHY0,
2455 			.bxt.phy = DPIO_PHY0,
3431 		PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY0) |  in chv_phy_control_init()
3433 		PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) |  in chv_phy_control_init()
3434 		PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH1) |  in chv_phy_control_init()
3453 				PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0);  in chv_phy_control_init()
3456 			PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0);  in chv_phy_control_init()
3463 				PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1);  in chv_phy_control_init()
3466 			PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1);  in chv_phy_control_init()
3468 		dev_priv->chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY0);  in chv_phy_control_init()
3470 		dev_priv->chv_phy_assert[DPIO_PHY0] = false;  in chv_phy_control_init()
3472 		dev_priv->chv_phy_assert[DPIO_PHY0] = true;  in chv_phy_control_init()