Searched refs:COMPOSITE (Results 1 – 13 of 13) sorted by relevance
278 COMPOSITE(SCLK_RTC32K, "clk_rtc32k", mux_2plls_xin24m_p, 0,316 COMPOSITE(0, "aclk_gpu_pre", mux_4plls_p, 0,325 COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IGNORE_UNUSED,337 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_2plls_hdmiphy_p, 0,356 COMPOSITE(ACLK_BUS_PRE, "aclk_bus_pre", mux_2plls_hdmiphy_p, 0,370 COMPOSITE(SCLK_TSP, "clk_tsp", mux_2plls_p, 0,377 COMPOSITE(0, "clk_i2s0_div", mux_2plls_p, 0,387 COMPOSITE(0, "clk_i2s1_div", mux_2plls_p, 0,400 COMPOSITE(0, "clk_i2s2_div", mux_2plls_p, 0,413 COMPOSITE(0, "clk_spdif_div", mux_2plls_p, 0,[all …]
429 COMPOSITE(ACLK_USB3, "aclk_usb3", mux_pll_src_cpll_gpll_npll_p, 0,448 COMPOSITE(SCLK_USB3OTG0_SUSPEND, "clk_usb3otg0_suspend", mux_pll_p, 0,452 COMPOSITE(SCLK_USB3OTG1_SUSPEND, "clk_usb3otg1_suspend", mux_pll_p, 0,456 COMPOSITE(SCLK_UPHY0_TCPDPHY_REF, "clk_uphy0_tcpdphy_ref", mux_pll_p, 0,460 COMPOSITE(SCLK_UPHY0_TCPDCORE, "clk_uphy0_tcpdcore", mux_pll_src_24m_32k_cpll_gpll_p, 0,464 COMPOSITE(SCLK_UPHY1_TCPDPHY_REF, "clk_uphy1_tcpdphy_ref", mux_pll_p, 0,468 COMPOSITE(SCLK_UPHY1_TCPDCORE, "clk_uphy1_tcpdcore", mux_pll_src_24m_32k_cpll_gpll_p, 0,552 COMPOSITE(0, "aclk_gmac_pre", mux_aclk_gmac_p, 0,571 COMPOSITE(SCLK_MAC, "clk_gmac", mux_pll_src_cpll_gpll_npll_p, 0,587 COMPOSITE(0, "clk_spdif_div", mux_pll_src_cpll_gpll_p, 0,[all …]
227 COMPOSITE(0, "aclk_rkvenc_pre", mux_pll_src_4plls_p, 0,232 COMPOSITE(SCLK_VENC_CORE, "clk_venc_core", mux_pll_src_4plls_p, 0,245 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_4plls_p, 0,250 COMPOSITE(SCLK_HEVC_CABAC, "clk_hevc_cabac", mux_pll_src_4plls_p, 0,254 COMPOSITE(0, "aclk_rkvdec_pre", mux_pll_src_4plls_p, 0,257 COMPOSITE(0, "aclk_vpu_pre", mux_pll_src_4plls_p, 0,293 COMPOSITE(SCLK_PWM0_PMU, "sclk_pwm0_pmu", mux_pll_src_2plls_p, 0,296 COMPOSITE(SCLK_I2C0_PMU, "sclk_i2c0_pmu", mux_pll_src_2plls_p, 0,305 COMPOSITE(SCLK_WIFI, "sclk_wifi", mux_wifi_src_p, 0,354 COMPOSITE(SCLK_DSP, "sclk_dsp", mux_dsp_src_p, 0,[all …]
234 COMPOSITE(0, "ddrphy4x", mux_ddrphy_p, CLK_IGNORE_UNUSED,289 COMPOSITE(ACLK_VPU_PRE, "aclk_vpu_pre", mux_pll_src_4plls_p, 0,295 COMPOSITE(ACLK_RKVDEC_PRE, "aclk_rkvdec_pre", mux_pll_src_4plls_p, 0,301 COMPOSITE(SCLK_VDEC_CABAC, "sclk_vdec_cabac", mux_pll_src_4plls_p, 0,305 COMPOSITE(SCLK_VDEC_CORE, "sclk_vdec_core", mux_pll_src_4plls_p, 0,310 COMPOSITE(ACLK_IEP_PRE, "aclk_iep_pre", mux_pll_src_4plls_p, 0,316 COMPOSITE(ACLK_HDCP_PRE, "aclk_hdcp_pre", mux_pll_src_4plls_p, 0,325 COMPOSITE(SCLK_RGA, "sclk_rga", mux_sclk_rga_p, 0,329 COMPOSITE(ACLK_VOP_PRE, "aclk_vop_pre", mux_pll_src_4plls_p, 0,333 COMPOSITE(SCLK_HDCP, "sclk_hdcp", mux_pll_src_3plls_p, 0,[all …]
387 COMPOSITE(ACLK_VI_PRE, "aclk_vi_pre", mux_gpll_cpll_npll_p, 0,393 COMPOSITE(SCLK_ISP, "clk_isp", mux_gpll_cpll_npll_p, 0,396 COMPOSITE(SCLK_CIF_OUT, "clk_cif_out", mux_cif_out_p, 0,409 COMPOSITE(ACLK_VO_PRE, "aclk_vo_pre", mux_gpll_cpll_npll_p, 0,418 COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_gpll_cpll_npll_p, 0,422 COMPOSITE(SCLK_VOPB_PWM, "clk_vopb_pwm", mux_gpll_xin24m_p, 0,425 COMPOSITE(0, "dclk_vopb_src", mux_cpll_npll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,434 COMPOSITE(0, "dclk_vopl_src", mux_npll_cpll_p, 0,445 COMPOSITE(0, "aclk_vpu_pre", mux_gpll_cpll_npll_p, 0,451 COMPOSITE(SCLK_CORE_VPU, "sclk_core_vpu", mux_gpll_cpll_npll_p, 0,[all …]
242 COMPOSITE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, 0,258 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_5plls_p, 0,263 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_5plls_p, 0,269 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_5plls_p, 0,274 COMPOSITE(ACLK_VIO0, "aclk_vio0", mux_pll_src_5plls_p, 0,277 COMPOSITE(ACLK_VIO1, "aclk_vio1", mux_pll_src_5plls_p, 0,280 COMPOSITE(HCLK_VIO, "hclk_vio", mux_pll_src_4plls_p, 0,326 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc0", mux_mmc_src_p, 0,330 COMPOSITE(SCLK_SDIO, "sclk_sdio", mux_mmc_src_p, 0,334 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,[all …]
326 COMPOSITE(0, "aclk_cci_pre", mux_pll_src_cpll_gpll_usb_npll_p, CLK_IGNORE_UNUSED,362 COMPOSITE(0, "fclk_mcu_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,373 COMPOSITE(0, "i2s_8ch_src", mux_pll_src_cpll_gpll_p, 0,385 COMPOSITE(0, "spdif_8ch_src", mux_pll_src_cpll_gpll_p, 0,394 COMPOSITE(0, "i2s_2ch_src", mux_pll_src_cpll_gpll_p, 0,404 COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,422 COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_npll_usb_p, 0,425 COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_npll_usb_p, 0,436 COMPOSITE(0, "sclk_hevc_cabac_src", mux_pll_src_cpll_gpll_npll_usb_p, 0,439 COMPOSITE(0, "sclk_hevc_core_src", mux_pll_src_cpll_gpll_npll_usb_p, 0,[all …]
342 COMPOSITE(0, "i2s_src", mux_pll_src_cpll_gpll_p, 0,396 COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_usb480m_p, 0,399 COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_usb480m_p, 0,413 COMPOSITE(0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED,418 COMPOSITE(0, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED,422 COMPOSITE(0, "aclk_rga_pre", mux_pll_src_cpll_gpll_usb480m_p, 0,425 COMPOSITE(SCLK_RGA, "sclk_rga", mux_pll_src_cpll_gpll_usb480m_p, 0,429 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,432 COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,439 COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,[all …]
217 COMPOSITE(0, "aclk_peri_src", mux_pll_src_3plls_p, 0,269 COMPOSITE(0, "aclk_vcodec", mux_pll_src_3plls_p, 0,275 COMPOSITE(0, "aclk_hvec", mux_pll_src_3plls_p, 0,279 COMPOSITE(0, "aclk_disp1_pre", mux_pll_src_3plls_p, 0,282 COMPOSITE(0, "hclk_disp_pre", mux_pll_src_3plls_p, 0,285 COMPOSITE(SCLK_LCDC, "dclk_lcdc", mux_pll_src_3plls_p, 0,301 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,314 COMPOSITE(0, "i2s_src", mux_pll_src_3plls_p, 0,327 COMPOSITE(0, "spdif_src", mux_pll_src_3plls_p, 0,338 COMPOSITE(SCLK_GPU, "sclk_gpu", mux_pll_src_3plls_p, 0,[all …]
293 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,298 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,306 COMPOSITE(0, "ddrphy", mux_ddrphy_p, CLK_IGNORE_UNUSED,320 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,323 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,360 COMPOSITE(0, "mac_src", mux_mac_p, 0,368 COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,582 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_gpll_cpll_p, 0,586 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,591 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,[all …]
420 #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ macro
1270 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ macro1289 COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE | _flags,\1687 COMPOSITE(PLL1_P, "pll1_p", PARENT("pll1"), 0,1692 COMPOSITE(PLL2_P, "pll2_p", PARENT("pll2"), 0,1697 COMPOSITE(PLL2_Q, "pll2_q", PARENT("pll2"), 0,1702 COMPOSITE(PLL2_R, "pll2_r", PARENT("pll2"), CLK_IS_CRITICAL,1707 COMPOSITE(PLL3_P, "pll3_p", PARENT("pll3"), 0,1712 COMPOSITE(PLL3_Q, "pll3_q", PARENT("pll3"), 0,1717 COMPOSITE(PLL3_R, "pll3_r", PARENT("pll3"), 0,1722 COMPOSITE(PLL4_P, "pll4_p", PARENT("pll4"), 0,[all …]
23 .. _MEDIA-ENT-F-CONN-COMPOSITE:
