Searched refs:CLK_SPDIF0 (Results 1 – 1 of 1) sorted by relevance
40 #define CLK_SPDIF0 (lsp0crpm_base + 0x10) macro621 ARRAY_SIZE(spdif0_wclk_sel), CLK_SPDIF0, 4, 1); in zx296702_lsp0_clocks_init()623 zx_gate("spdif0_wclk", "spdif0_wclk_mux", CLK_SPDIF0, 1); in zx296702_lsp0_clocks_init()625 zx_gate("spdif0_pclk", "lsp0_apb_pclk", CLK_SPDIF0, 0); in zx296702_lsp0_clocks_init()
