BANK_WIDTH (reference) in projects: Linux-v4.19

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Searched refs:BANK_WIDTH (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
D	gfx_v6_0.c	82 #define BANK_WIDTH(x) ((x) << 14) macro 421 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 429 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 437 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 444 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 456 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 464 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 472 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 484 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() 492 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v6_0_tiling_mode_table_init() [all …]
D	gfx_v8_0.c	69 #define BANK_WIDTH(x) ((x) << GB_MACROTILE_MODE0__BANK_WIDTH__SHIFT) macro 2347 mod2array[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) \| in gfx_v8_0_tiling_mode_table_init() 2351 mod2array[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) \| in gfx_v8_0_tiling_mode_table_init() 2355 mod2array[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) \| in gfx_v8_0_tiling_mode_table_init() 2359 mod2array[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v8_0_tiling_mode_table_init() 2363 mod2array[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v8_0_tiling_mode_table_init() 2367 mod2array[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v8_0_tiling_mode_table_init() 2371 mod2array[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v8_0_tiling_mode_table_init() 2375 mod2array[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) \| in gfx_v8_0_tiling_mode_table_init() 2379 mod2array[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) \| in gfx_v8_0_tiling_mode_table_init() [all …]
D	gfx_v7_0.c	1157 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1161 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1165 macrotile[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1169 macrotile[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1173 macrotile[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1177 macrotile[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1181 macrotile[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() 1185 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) \| in gfx_v7_0_tiling_mode_table_init() 1189 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) \| in gfx_v7_0_tiling_mode_table_init() 1193 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in gfx_v7_0_tiling_mode_table_init() [all …]
D	cikd.h	`196 # define BANK_WIDTH(x) ((x) << 0) macro`
D	sid.h	`1204 # define BANK_WIDTH(x) ((x) << 14) macro`
D	dce_v8_0.c	`1876 bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); in dce_v8_0_crtc_do_set_base()`
D	dce_v6_0.c	`1899 bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); in dce_v6_0_crtc_do_set_base()`
D	dce_v11_0.c	`1996 bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); in dce_v11_0_crtc_do_set_base()`
D	dce_v10_0.c	`1954 bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); in dce_v10_0_crtc_do_set_base()`
/Linux-v4.19/drivers/gpu/drm/radeon/
D	si.c	2521 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2530 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2539 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2548 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2557 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2566 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2575 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2584 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2593 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() 2602 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in si_tiling_mode_table_init() [all …]
D	cik.c	2445 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2449 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2453 macrotile[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2457 macrotile[3] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2461 macrotile[4] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2465 macrotile[5] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2469 macrotile[6] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2473 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2477 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() 2481 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) \| in cik_tiling_mode_table_init() [all …]
D	sid.h	`1206 # define BANK_WIDTH(x) ((x) << 14) macro`
D	cikd.h	`1260 # define BANK_WIDTH(x) ((x) << 0) macro`
/Linux-v4.19/drivers/gpu/drm/amd/display/amdgpu_dm/
D	amdgpu_dm.c	`2063 bankw = AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); in fill_plane_attributes_from_fb()`