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Searched refs:APBC_SSP1 (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/clk/mmp/
Dclk-of-pxa168.c37 #define APBC_SSP1 0x820 macro
135 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
157 …{PXA168_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_…
Dclk-of-pxa910.c36 #define APBC_SSP1 0x20 macro
132 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
154 …{PXA910_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_…
Dclk-pxa910.c33 #define APBC_SSP1 0x20 macro
250 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in pxa910_clk_init()
254 apbc_base + APBC_SSP1, 10, 0, &clk_lock); in pxa910_clk_init()
Dclk-of-mmp2.c44 #define APBC_SSP1 0x54 macro
147 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
173 …{MMP2_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x7, 0x3, 0x0, 0, &ssp1_lo…
Dclk-pxa168.c33 #define APBC_SSP1 0x820 macro
245 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in pxa168_clk_init()
248 clk = mmp_clk_register_apbc("ssp1", "ssp1_mux", apbc_base + APBC_SSP1, in pxa168_clk_init()
Dclk-mmp2.c41 #define APBC_SSP1 0x54 macro
302 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in mmp2_clk_init()
306 apbc_base + APBC_SSP1, 10, 0, &clk_lock); in mmp2_clk_init()
/Linux-v4.19/arch/arm/mach-mmp/
Dclock-pxa910.c25 #define APBC_SSP1 APBC_REG(0x01c) macro
Dclock-pxa168.c30 #define APBC_SSP1 APBC_REG(0x81c) macro
Dclock-mmp2.c33 #define APBC_SSP1 APBC_REG(0x050) macro