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/Linux-v6.1/drivers/w1/slaves/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
12 wire.
17 Say Y here if you want to connect 1-wire
18 simple 64bit memory rom(ds2401/ds2411/ds1990*) to your wire.
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
[all …]
/Linux-v6.1/drivers/w1/masters/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire bus master configuration
6 menu "1-wire Bus Masters"
9 tristate "Matrox G400 transport layer for 1-wire"
12 Say Y here if you want to communicate with your 1-wire devices
19 tristate "DS2490 USB <-> W1 transport layer for 1-wire"
22 Say Y here if you want to have a driver for DS2490 based USB <-> W1 bridges,
29 tristate "Maxim DS2482 I2C to 1-Wire bridge"
33 I2C to 1-Wire bridge.
39 tristate "Freescale MXC 1-wire busmaster"
[all …]
Dds2482.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ds2482.c - provides i2c to w1-master bridge(s)
7 * It is a I2C to 1-wire bridge.
8 * There are two variations: -100 and -800, which have 1 or 8 1-wire ports.
10 * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/4382
26 * The APU bit controls whether an active pullup (controlled slew-rate
27 * transistor) or a passive pullup (Rwpu resistor) will be used to drive
28 * a 1-Wire line from low to high. When APU = 0, active pullup is disabled
30 * only a single slave on the 1-Wire line.
35 "0-disable, 1-enable (default)");
[all …]
Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/iio/temperature/
Dmaxim,max31865.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Navin Sankar Velliangiri <navin@linumiz.com>
22 maxim,3-wire:
25 enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.
28 spi-cpha: true
31 - compatible
32 - reg
33 - spi-cpha
[all …]
/Linux-v6.1/Documentation/peci/
Dpeci.rst1 .. SPDX-License-Identifier: GPL-2.0-only
13 controller is acting as a PECI originator and the processor - as
15 PECI can be used in both single processor and multiple-processor based
24 PECI Wire
25 ---------
27 PECI Wire interface uses a single wire for self-clocking and data
28 transfer. It does not require any additional control lines - the
29 physical layer is a self-clocked one-wire bus signal that begins each
32 value is logic '0' or logic '1'. PECI Wire also includes variable data
35 For PECI Wire, each processor package will utilize unique, fixed
[all …]
/Linux-v6.1/drivers/w1/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Dallas's 1-wire support"
6 Dallas' 1-wire bus is useful to connect slow 1-pin devices
12 will be called wire.
22 information see <file:Documentation/driver-api/connector.rst>.
24 1. Events. They are generated each time new master or slave device found
25 either due to automatic or requested search.
/Linux-v6.1/arch/sh/mm/
Dtlb-urb.c2 * arch/sh/mm/tlb-urb.c
4 * TLB entry wiring helpers for URB-equipped parts.
18 * Load the entry for 'addr' into the TLB and wire the entry.
32 * Make sure we're not trying to wire the last TLB entry slot. in tlb_wire_entry()
34 BUG_ON(!--urb); in tlb_wire_entry()
39 * Insert this entry into the highest non-wired TLB slot (via in tlb_wire_entry()
49 /* ... and wire it up. */ in tlb_wire_entry()
64 * It should also be noted that it is not possible to wire and unwire
65 * TLB entries in an arbitrary order. If you wire TLB entry N, followed
67 * respect, it works like a stack or LIFO queue.
/Linux-v6.1/Documentation/devicetree/bindings/display/panel/
Dtpo,tpg110.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
17 and other properties, and has a control interface over 3WIRE
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
[all …]
/Linux-v6.1/include/linux/platform_data/
Dusb-omap1.h15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
20 * ... for OTG use as device OR host, initialize "otg"
24 u8 otg; /* port number, 1-based: usb1 == 2 */
35 * 2 == usb0-only, using internal transceiver
36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
/Linux-v6.1/Documentation/driver-api/gpio/
Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
32 represents a bit connected to a particular pin, or "ball" on Ball Grid Array
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
42 also "GPIO Expander" chips that connect using the I2C or SPI serial buses.
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
[all …]
/Linux-v6.1/include/linux/
Dw1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * struct w1_reg_num - broken out slave device id
49 * struct w1_slave - holds a single slave device on the bus
51 * @owner: Points to the one wire "wire" kernel module.
84 * struct w1_bus_master - operations available on a bus master
88 * @read_bit: Sample the line level @return the level read (0 or 1)
92 * @touch_bit: the lowest-level function for devices that really support the
93 * 1-wire protocol.
94 * touch_bit(0) = write-0 cycle
95 * touch_bit(1) = write-1 / read cycle
[all …]
/Linux-v6.1/drivers/net/ethernet/sfc/
Dtc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright 2020-2022 Xilinx Inc.
7 * This program is free software; you can redistribute it and/or modify it
19 * insertion is not supported; errors in internal operation or in the
25 if (efx->log_tc_errs) \
26 netif_info(efx, drv, efx->net_dev, "%s\n", message); \
32 if (efx->log_tc_errs) \
33 netif_info(efx, drv, efx->net_dev, fmt, ##args);\
74 * struct efx_tc_state - control plane data for TC offload
79 * @match_action_ht: Hashtable of TC match-action rules
[all …]
/Linux-v6.1/Documentation/w1/
Dw1-generic.rst2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
6 signal wire (plus ground, so two wires).
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/input/touchscreen/
Dti,am3359-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
36 ti,wire-config:
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dawinic,aw8738.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
14 (set using one-wire pulse control). The mode configures the speaker-guard
18 - $ref: name-prefix.yaml#
24 mode-gpios:
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
27 (active-low), but this is misleading since it is actually more than
32 description: Operation mode (number of pulses for one-wire pulse control)
[all …]
/Linux-v6.1/sound/ppc/
Dsnd_ps3_reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * three wire serial
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
92 corresponding bit in PS3_AUDIO_INTR_0. The resulting bits are OR'd together
96 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
98 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
106 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
125 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
[all …]
/Linux-v6.1/drivers/bluetooth/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
36 kernel or say M to compile it as module (btusb).
91 kernel or say M to compile it as module (btsdio).
106 kernel or say M to compile it as module (hci_uart).
176 bool "Three-wire UART (H5) protocol support"
180 The HCI Three-wire UART Transport Layer makes it possible to
182 Three-wire UART Transport Layer assumes that the UART
183 communication may have bit errors, overrun errors or burst
186 Say Y here to compile support for Three-wire UART protocol.
223 The Realtek protocol support enables Bluetooth HCI over 3-Wire
[all …]
/Linux-v6.1/Documentation/sound/soc/
Ddai.rst12 AC97 is a five wire interface commonly found on many PC sound cards. It is
26 I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
29 controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
35 I2S has several different operating modes:-
50 PCM is another 4 wire interface, very similar to I2S, which can support a more
58 Common PCM operating modes:-
/Linux-v6.1/Documentation/devicetree/bindings/w1/
Domap-hdq.txt1 * OMAP HDQ One wire bus master controller
4 - compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
5 - reg : Address and length of the register set for the device
6 - interrupts : interrupt line.
7 - ti,hwmods : "hdq1w"
10 - ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
15 - From omap3.dtsi
17 compatible = "ti,omap3-1w";
/Linux-v6.1/include/linux/mfd/
Dmxs-lradc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Freescale MXS Low Resolution Analog-to-Digital Converter driver
110 #define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
117 * and/or touch-buttons and generic LRADC block. Therefore when using
121 * CH0 -- Touch button #0
122 * CH1 -- Touch button #1
123 * CH2 -- Touch screen XPUL
124 * CH3 -- Touch screen YPLL
125 * CH4 -- Touch screen XNUL
126 * CH5 -- Touch screen YNLR
[all …]
/Linux-v6.1/Documentation/hwmon/
Dlm85.rst8 Prefix: 'lm85b' or 'lm85c'
79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
107 423 or socket 478 package. They can also measure temperature using a
[all …]
/Linux-v6.1/include/rdma/
Dsignature.h1 /* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) */
3 * Copyright (c) 2017-2018 Mellanox Technologies. All rights reserved.
23 * enum ib_signature_type - Signature types
25 * @IB_SIG_TYPE_T10_DIF: Type T10-DIF
33 * enum ib_t10_dif_bg_type - Signature T10-DIF block-guard types
34 * @IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
43 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
45 * @bg_type: T10-DIF block guard type (CRC|CSUM)
68 * struct ib_sig_domain - Parameters for signature domain
81 * struct ib_sig_attrs - Parameters for signature handover operation
[all …]
/Linux-v6.1/drivers/irqchip/
Dirq-al-fic.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
50 u32 control = readl_relaxed(fic->base + AL_FIC_CONTROL); in al_fic_set_trigger()
59 gc->chip_types->handler = handler; in al_fic_set_trigger()
60 fic->state = new_state; in al_fic_set_trigger()
61 writel_relaxed(control, fic->base + AL_FIC_CONTROL); in al_fic_set_trigger()
67 struct al_fic *fic = gc->private; in al_fic_irq_set_type()
76 ret = -EINVAL; in al_fic_irq_set_type()
84 * A given FIC instance can be either all level or all edge triggered. in al_fic_irq_set_type()
92 if (fic->state == AL_FIC_UNCONFIGURED) { in al_fic_irq_set_type()
[all …]
/Linux-v6.1/drivers/infiniband/ulp/iser/
Diser_memory.c3 * Copyright (c) 2013-2014 Mellanox Technologies. All rights reserved.
8 * COPYING in the main directory of this source tree, or the
11 * Redistribution and use in source and binary forms, with or
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
21 * disclaimer in the documentation and/or other materials
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
[all …]

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