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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
23 max98360a: audio-codec-0 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&amp_en>;
27 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
28 #sound-dai-cells = <0>;
31 wcd9385: audio-codec-1 {
[all …]
Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
30 pmg1110-regulators {
[all …]
Dqcs404-evb-4000.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include "qcs404-evb.dtsi"
11 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
18 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
19 snps,reset-active-low;
20 snps,reset-delays-us = <0 10000 10000>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&ethernet_defaults>;
[all …]
Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 compatible = "qcom,sc7180-idp", "qcom,sc7180";
29 stdout-path = "serial0:115200n8";
41 /delete-node/ &hyp_mem;
42 /delete-node/ &xbl_mem;
43 /delete-node/ &aop_mem;
[all …]
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
13 interrupt-parent = <&intc>;
15 #address-cells = <2>;
[all …]
/Linux-v6.1/sound/soc/fsl/
Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include "imx-pcm.h"
45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
56 int adir = (dir == TX) ? RX : TX; in fsl_sai_dir_is_synced()
59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
66 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state()
69 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state()
73 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state()
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimx6qdl-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
13 * Special SoM hardware required which uses the pins from micro SD card. The
14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
17 * pins, see uart1 and usdhc3 node below.
27 * during TX anyway and that it only controls drive enable DE
30 rs485-rx-en-hog {
31 gpio-hog;
33 line-name = "rs485-rx-en";
[all …]
Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
[all …]
Dsama5d3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
Dsama5d4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/mfd/at91-usart.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
[all …]
Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
28 st,pins = "i2c0_grp";
32 st,pins = "i2s0_grp";
36 st,pins = "i2s1_grp";
[all …]
Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun6i-rtc.h>
44 #include <dt-bindings/clock/sun8i-de2.h>
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/reset/sun8i-de2.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 interrupt-parent = <&gic>;
[all …]
Dvf610-zii-scu4-aib.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations
5 /dts-v1/;
10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";
13 stdout-path = &uart0;
21 gpio-leds {
22 compatible = "gpio-leds";
23 pinctrl-0 = <&pinctrl_leds_debug>;
24 pinctrl-names = "default";
29 linux,default-trigger = "heartbeat";
[all …]
Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
21 i2c-bus = <&i2c4>;
22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
24 maximum-power-milliwatt = <2500>;
[all …]
Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/clock/sun6i-rtc.h>
50 #include <dt-bindings/reset/sun6i-a31-ccu.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
[all …]
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
33 switch-14 {
37 wakeup-source;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/marvell/
Darmada-8040-mcbin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-8040.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
15 "marvell,armada-ap806-quad", "marvell,armada-ap806";
18 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
37 regulator-min-microvolt = <3300000>;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/xilinx/
Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 model = "ZynqMP zc1751-xm016-dc2 RevA";
19 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/microchip/
Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
17 compatible = "gpio-leds";
53 default-state = "off";
58 default-state = "off";
63 default-state = "off";
68 default-state = "off";
73 default-state = "off";
[all …]
/Linux-v6.1/drivers/pinctrl/
Dpinctrl-artpec6.c2 * Driver for the Axis ARTPEC-6 pin controller
18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
26 #define ARTPEC6_LAST_PIN 97 /* 97 pins in pinmux */
59 struct pinctrl_pin_desc *pins; member
69 const unsigned int *pins; member
80 /* pins */
215 .pins = cpuclkout_pins0,
221 .pins = udlclkout_pins0,
227 .pins = i2c1_pins0,
[all …]
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/media/
Dst-rc.txt1 Device-Tree bindings for ST IRB IP
4 - compatible: Should contain "st,comms-irb".
5 - reg: Base physical address of the controller and length of memory
7 - interrupts: interrupt-specifier for the sole interrupt generated by
10 - rx-mode: can be "infrared" or "uhf". This property specifies the L1
11 protocol used for receiving remote control signals. rx-mode should
12 be present iff the rx pins are wired up.
13 - tx-mode: should be "infrared". This property specifies the L1
14 protocol used for transmitting remote control signals. tx-mode should
15 be present iff the tx pins are wired up.
[all …]

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