Searched +full:tsd2d +full:- +full:ns (Results 1 – 24 of 24) sorted by relevance
/Linux-v6.1/arch/arm/boot/dts/ |
D | socfpga_arria10_socdk_qspi.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 compatible = "micron,mt25qu02g", "jedec,spi-nor"; 17 spi-max-frequency = <100000000>; 19 m25p,fast-read; 20 cdns,page-size = <256>; 21 cdns,block-size = <16>; 22 cdns,read-delay = <3>; [all …]
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D | socfpga_cyclone5_vining_fpga.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga"; 16 stdout-path = "serial0:115200n8"; 34 gpio-keys { 35 compatible = "gpio-keys"; 68 regulator-usb-nrst { 69 compatible = "regulator-fixed"; 70 regulator-name = "usb_nrst"; [all …]
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D | socfpga_cyclone5_socrates.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga"; 18 stdout-path = "serial0:115200n8"; 27 leds: gpio-leds { 32 phy-mode = "rgmii"; 54 compatible = "gpio-leds"; 59 linux,default-trigger = "heartbeat"; 81 #address-cells = <1>; 82 #size-cells = <1>; 83 compatible = "micron,n25q256a", "jedec,spi-nor"; [all …]
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D | socfpga_arria5_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga"; 14 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 54 compatible = "regulator-fixed"; 55 regulator-name = "3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 63 phy-mode = "rgmii"; 65 rxd0-skew-ps = <0>; [all …]
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D | socfpga_cyclone5_sodia.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga"; 16 stdout-path = "serial0:115200n8"; 30 compatible = "regulator-fixed"; 31 regulator-name = "3.3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 36 leds: gpio-leds { [all …]
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D | socfpga_cyclone5_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga"; 14 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 54 compatible = "regulator-fixed"; 55 regulator-name = "3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 67 phy-mode = "rgmii"; 69 rxd0-skew-ps = <0>; [all …]
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D | socfpga_cyclone5_sockit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga"; 14 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 36 linux,default-trigger = "heartbeat"; 42 linux,default-trigger = "heartbeat"; 48 linux,default-trigger = "heartbeat"; 54 linux,default-trigger = "heartbeat"; 58 gpio-keys { 59 compatible = "gpio-keys"; [all …]
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D | keystone-k2g-ice.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 7 /dts-v1/; 9 #include "keystone-k2g.dtsi" 10 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 26 dsp_common_memory: dsp-common-memory@81f800000 { [all …]
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D | keystone-k2g-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ 7 /dts-v1/; 9 #include "keystone-k2g.dtsi" 12 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone"; 20 reserved-memory { 21 #address-cells = <2>; 22 #size-cells = <2>; 25 dsp_common_memory: dsp-common-memory@81f800000 { 26 compatible = "shared-dma-pool"; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/spi/ |
D | cdns,qspi-nor-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Peripheral-specific properties for the Cadence QSPI controller. 10 See spi-peripheral-props.yaml for more info. 13 - Vaishnav Achath <vaishnav.a@ti.com> 16 # cdns,qspi-nor.yaml 17 cdns,read-delay: 22 cdns,tshsl-ns: [all …]
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/Linux-v6.1/arch/arm64/boot/dts/intel/ |
D | socfpga_n5x_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 29 sdram_edac: memory-controller@f87f8000 { 30 compatible = "snps,ddrc-3.80a"; 39 compatible = "intel,easic-n5x-clkmgr"; 44 phy-mode = "rgmii"; 45 phy-handle = <&phy0>; 47 max-frame-size = <9000>; 50 #address-cells = <1>; [all …]
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D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 53 phy-mode = "rgmii"; 54 phy-handle = <&phy0>; 56 max-frame-size = <9000>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 compatible = "snps,dwmac-mdio"; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/altera/ |
D | socfpga_stratix10_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 20 stdout-path = "serial0:115200n8"; 24 compatible = "gpio-leds"; 47 ref_033v: regulator-v-ref { 48 compatible = "regulator-fixed"; 49 regulator-name = "0.33V"; 50 regulator-min-microvolt = <330000>; 51 regulator-max-microvolt = <330000>; 56 sdmmca-ecc@ff8c8c00 { [all …]
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D | socfpga_stratix10_socdk_nand.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 20 stdout-path = "serial0:115200n8"; 24 compatible = "gpio-leds"; 47 ref_033v: regulator-v-ref { 48 compatible = "regulator-fixed"; 49 regulator-name = "0.33V"; 50 regulator-min-microvolt = <330000>; 51 regulator-max-microvolt = <330000>; 56 sdmmca-ecc@ff8c8c00 { [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-j7200-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j7200.dtsi" 18 reserved_memory: reserved-memory { 19 #address-cells = <2>; 20 #size-cells = <2>; 26 no-map; 29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { 30 compatible = "shared-dma-pool"; [all …]
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D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j721e.dtsi" 18 reserved_memory: reserved-memory { 19 #address-cells = <2>; 20 #size-cells = <2>; 26 no-map; 29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { 30 compatible = "shared-dma-pool"; [all …]
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D | k3-am654-base-board.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-am654.dtsi" 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "ti,am654-evm", "ti,am654"; 17 stdout-path = "serial2:115200n8"; 28 reserved-memory { 29 #address-cells = <2>; [all …]
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D | k3-am625-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-am625.dtsi" 16 compatible = "ti,am625-sk", "ti,am625"; 30 stdout-path = "serial2:115200n8"; 41 reserved-memory { [all …]
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D | k3-am642-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/mux/ti-serdes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-am642.dtsi" 16 compatible = "ti,am642-evm", "ti,am642"; [all …]
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D | k3-am642-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/mux/ti-serdes.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/leds/common.h> 13 #include "k3-am642.dtsi" 16 compatible = "ti,am642-sk", "ti,am642"; [all …]
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D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) Siemens AG, 2018-2021 12 #include "k3-am654.dtsi" 13 #include <dt-bindings/phy/phy.h> 23 stdout-path = "serial3:115200n8"; 27 reserved-memory { 28 #address-cells = <2>; 29 #size-cells = <2>; 32 secure_ddr: secure-ddr@9e800000 { 33 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ [all …]
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D | k3-j721e-common-proc-board.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j721e-som-p0.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy-cadence.h> 15 compatible = "ti,j721e-evm", "ti,j721e"; 19 stdout-path = "serial2:115200n8"; [all …]
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D | k3-j721e-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/net/ti-dp83867.h> 16 compatible = "ti,j721e-sk", "ti,j721e"; 20 stdout-path = "serial2:115200n8"; [all …]
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/Linux-v6.1/drivers/spi/ |
D | spi-cadence-quadspi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 // Copyright Altera Corporation (C) 2012-2014. All rights reserved. 6 // Copyright Intel Corporation (C) 2019-2020. All rights reserved. 7 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com 12 #include <linux/dma-mapping.h> 16 #include <linux/firmware/xlnx-zynqmp.h> 31 #include <linux/spi/spi-mem.h> 34 #define CQSPI_NAME "cadence-qspi" 291 u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); in cqspi_is_idle() 298 u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL); in cqspi_get_rd_sram_level() [all …]
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