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Searched +full:tegra194 +full:- +full:ccplex (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/arm/
Dnvidia,tegra194-ccplex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: NVIDIA Tegra194 CPU Complex device tree bindings
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
12 - Sumit Gupta <sumitg@nvidia.com>
15 Tegra194 SOC has homogeneous architecture where each cluster has two
25 - nvidia,tegra194-ccplex
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/Linux-v5.15/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/reset/tegra234-reset.h>
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
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Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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/Linux-v5.15/drivers/mailbox/
Dtegra-hsp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
18 #include <dt-bindings/mailbox/tegra186-hsp.h>
113 return readl(hsp->regs + offset); in tegra_hsp_readl()
119 writel(value, hsp->regs + offset); in tegra_hsp_writel()
125 return readl(channel->regs + offset); in tegra_hsp_channel_readl()
131 writel(value, channel->regs + offset); in tegra_hsp_channel_writel()
138 value = tegra_hsp_channel_readl(&db->channel, HSP_DB_ENABLE); in tegra_hsp_doorbell_can_ring()
148 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
149 if (entry->master == master) in __tegra_hsp_doorbell_get()
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/Linux-v5.15/drivers/cpufreq/
Dtegra194-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
19 #include <soc/tegra/bpmp-abi.h>
65 * Read per-core Read-only system register NVFREQ_FEEDBACK_EL1.
85 return nltbl->ref_clk_hz / KHZ * ndiv / (nltbl->pdiv * nltbl->mdiv); in map_ndiv_to_freq()
108 c = &read_counters_work->c; in tegra_read_counters()
111 c->last_refclk_cnt = lower_32_bits(val); in tegra_read_counters()
112 c->last_coreclk_cnt = upper_32_bits(val); in tegra_read_counters()
115 c->refclk_cnt = lower_32_bits(val); in tegra_read_counters()
116 c->coreclk_cnt = upper_32_bits(val); in tegra_read_counters()
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/Linux-v5.15/drivers/soc/tegra/fuse/
Dfuse-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
11 #include <linux/nvmem-consumer.h>
12 #include <linux/nvmem-provider.h>
38 { .compatible = "nvidia,tegra20-car", },
39 { .compatible = "nvidia,tegra30-car", },
40 { .compatible = "nvidia,tegra114-car", },
41 { .compatible = "nvidia,tegra124-car", },
42 { .compatible = "nvidia,tegra132-car", },
43 { .compatible = "nvidia,tegra210-car", },
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