| /Linux-v6.1/drivers/memory/tegra/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 tegra-mc-y := mc.o
4 tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
5 tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
6 tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
7 tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
8 tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
9 tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
10 tegra-mc-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o
11 tegra-mc-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra194.o
[all …]
|
| D | tegra186.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017-2021 NVIDIA CORPORATION. All rights reserved.
13 #include <soc/tegra/mc.h>
16 #include <dt-bindings/memory/tegra186-mc.h>
19 #include "mc.h"
25 static void tegra186_mc_program_sid(struct tegra_mc *mc) in tegra186_mc_program_sid() argument
29 for (i = 0; i < mc->soc->num_clients; i++) { in tegra186_mc_program_sid()
30 const struct tegra_mc_client *client = &mc->soc->clients[i]; in tegra186_mc_program_sid()
33 override = readl(mc->regs + client->regs.sid.override); in tegra186_mc_program_sid()
34 security = readl(mc->regs + client->regs.sid.security); in tegra186_mc_program_sid()
[all …]
|
| D | mc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
21 #include "mc.h"
25 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
28 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
31 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
34 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
37 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
40 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
43 { .compatible = "nvidia,tegra186-mc", .data = &tegra186_mc_soc },
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra186-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) SoC Memory Controller
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split
15 into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
16 handles memory requests for 40-bit virtual addresses from internal clients
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra186-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Hub
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
[all …]
|
| D | nvidia,tegra20-host1x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
[all …]
|
| /Linux-v6.1/arch/arm64/boot/dts/nvidia/ |
| D | tegra186.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
|
| D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
|
| D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/power/tegra234-powergate.h>
9 #include <dt-bindings/reset/tegra234-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/gpu/host1x/ |
| D | nvidia,tegra210-nvdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra210-nvdec
25 - nvidia,tegra186-nvdec
26 - nvidia,tegra194-nvdec
[all …]
|
| D | nvidia,tegra210-nvjpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvjpg@[0-9a-f]*$"
24 - nvidia,tegra210-nvjpg
25 - nvidia,tegra186-nvjpg
26 - nvidia,tegra194-nvjpg
[all …]
|
| D | nvidia,tegra210-nvenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
26 - nvidia,tegra194-nvenc
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
|
| /Linux-v6.1/include/soc/tegra/ |
| D | mc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/interconnect-provider.h>
14 #include <linux/reset-controller.h>
32 * Tegra SMMU, whereas on Tegra186 and later this is the ID used to override the ARM SMMU
57 /* stream ID overrides (Tegra186 and later) */
101 struct tegra_mc *mc);
106 struct tegra_mc *mc) in tegra_smmu_probe() argument
117 struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc);
122 tegra_gart_probe(struct device *dev, struct tegra_mc *mc) in tegra_gart_probe() argument
124 return ERR_PTR(-ENODEV); in tegra_gart_probe()
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/dma/ |
| D | nvidia,tegra186-gpc-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Rajesh Gumasta <rgumasta@nvidia.com>
19 - $ref: "dma-controller.yaml#"
24 - const: nvidia,tegra186-gpcdma
25 - items:
26 - enum:
[all …]
|
| /Linux-v6.1/drivers/dma/ |
| D | tegra186-gpc-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
10 #include <linux/dma-mapping.h>
21 #include <dt-bindings/memory/tegra186-mc.h>
22 #include "virt-dma.h"
87 /* MC sequence register */
118 (GENMASK((fls(bs) - 2), 0) << TEGRA_GPCDMA_MMIOSEQ_BURST_SHIFT)
158 * on-flight burst and update DMA status register.
200 * sub-transfer as per requester details and hw support. This sub transfer
259 writel_relaxed(val, tdc->tdma->base_addr + tdc->chan_base_offset + reg); in tdc_write()
[all …]
|
| /Linux-v6.1/drivers/gpu/host1x/ |
| D | dev.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
10 #include <linux/dma-mapping.h>
26 #include <asm/dma-iommu.h>
46 writel(v, host1x->common_regs + r); in host1x_common_writel()
51 writel(v, host1x->hv_regs + r); in host1x_hypervisor_writel()
56 return readl(host1x->hv_regs + r); in host1x_hypervisor_readl()
61 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; in host1x_sync_writel()
68 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; in host1x_sync_readl()
75 writel(v, ch->regs + r); in host1x_ch_writel()
[all …]
|
| /Linux-v6.1/drivers/clk/tegra/ |
| D | clk-tegra210.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/tegra210-car.h>
18 #include <dt-bindings/reset/tegra210-car.h>
23 #include "clk-id.h"
264 * SDM fractional divisor is 16-bit 2's complement signed number within
265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned
266 * 16-bit value, with "0" divisor mapped to 0xFFFF. Data "0" is used to
275 #define sdin_get_n_eff(cfg) ((cfg)->n * PLL_SDM_COEFF + ((cfg)->sdm_data ? \
[all …]
|
