/Linux-v6.6/Documentation/devicetree/bindings/sound/ |
D | qcom,q6dsp-lpass-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 18 - qcom,q6afe-dais 20 '#sound-dai-cells': 23 '#address-cells': 26 '#size-cells': 31 '^dai@[0-9]+$': [all …]
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D | fsl,sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 serial interfaces with frame synchronization such as I2S, AC97, TDM, and 21 - items: 22 - enum: 23 - fsl,imx6ul-sai 24 - fsl,imx7d-sai 25 - const: fsl,imx6sx-sai [all …]
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D | st,stm32-sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Olivier Moysan <olivier.moysan@foss.st.com> 14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 15 The SAI contains two independent audio sub-blocks. Each sub-block has 21 - st,stm32f4-sai 22 - st,stm32h7-sai 26 - description: Base address and size of SAI common register set. [all …]
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/Linux-v6.6/drivers/soc/fsl/qe/ |
D | tsa.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <dt-bindings/soc/cpm1-fsl,tsa.h> 33 /* SI mode register (32 bits) */ 54 /* SI global mode register (8 bits) */ 125 struct tsa_tdm tdm[2]; /* TDMa and TDMb */ member 135 return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]); in tsa_serial_get_tsa() 170 switch (tsa_serial->id) { in tsa_serial_connect() 184 dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id); in tsa_serial_connect() 185 return -EINVAL; in tsa_serial_connect() 188 spin_lock_irqsave(&tsa->lock, flags); in tsa_serial_connect() [all …]
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D | ucc_fast.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 * QE UCC Fast API Set - UCC Fast specific routines implementations. 28 printk(KERN_INFO "UCC%u Fast registers:\n", uccf->uf_info->ucc_num); in ucc_fast_dump_regs() 29 printk(KERN_INFO "Base address: 0x%p\n", uccf->uf_regs); in ucc_fast_dump_regs() 32 &uccf->uf_regs->gumr, ioread32be(&uccf->uf_regs->gumr)); in ucc_fast_dump_regs() 34 &uccf->uf_regs->upsmr, ioread32be(&uccf->uf_regs->upsmr)); in ucc_fast_dump_regs() 36 &uccf->uf_regs->utodr, ioread16be(&uccf->uf_regs->utodr)); in ucc_fast_dump_regs() 38 &uccf->uf_regs->udsr, ioread16be(&uccf->uf_regs->udsr)); in ucc_fast_dump_regs() 40 &uccf->uf_regs->ucce, ioread32be(&uccf->uf_regs->ucce)); in ucc_fast_dump_regs() 42 &uccf->uf_regs->uccm, ioread32be(&uccf->uf_regs->uccm)); in ucc_fast_dump_regs() [all …]
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/Linux-v6.6/sound/soc/ti/ |
D | davinci-mcasp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * Author: Nirmal Pandey <n-pandey@ti.com>, 70 /* Left(even TDM Slot) Channel Status Register File */ 72 /* Right(odd TDM slot) Channel Status Register File */ 74 /* Left(even TDM slot) User Data Register File */ 76 /* Right(odd TDM Slot) User Data Register File */ 100 * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management 107 * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits 108 * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits 109 * DAVINCI_MCASP_PDOUT_REG - Pin output in GPIO mode [all …]
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D | davinci-mcasp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Multi-channel Audio Serial Port Driver 7 * Author: Nirmal Pandey <n-pandey@ti.com>, 39 #include "edma-pcm.h" 40 #include "sdma-pcm.h" 41 #include "udma-pcm.h" 42 #include "davinci-mcasp.h" 136 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits() 143 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits() 150 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits() [all …]
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/Linux-v6.6/sound/soc/qcom/qdsp6/ |
D | q6afe-dai.c | 1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved. 14 #include "q6dsp-lpass-ports.h" 15 #include "q6dsp-common.h" 41 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_hw_params() 42 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim; in q6slim_hw_params() 44 slim->sample_rate = params_rate(params); in q6slim_hw_params() 49 slim->bit_width = 16; in q6slim_hw_params() 52 slim->bit_width = 24; in q6slim_hw_params() 55 slim->bit_width = 32; in q6slim_hw_params() [all …]
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/Linux-v6.6/Documentation/sound/soc/ |
D | dai.rst | 35 I2S has several different operating modes:- 51 flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used 54 while sync runs at the sample rate. PCM also supports Time Division 55 Multiplexing (TDM) in that several devices can use the bus simultaneously (this 56 is sometimes referred to as network mode). 58 Common PCM operating modes:- 60 Mode A 61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC. 63 Mode B 64 MSB is transmitted on rising edge of FRAME/SYNC.
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/Linux-v6.6/sound/soc/mediatek/mt8186/ |
D | mt8186-dai-tdm.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // MediaTek ALSA SoC Audio DAI TDM Control 11 #include "mt8186-afe-clk.h" 12 #include "mt8186-afe-common.h" 13 #include "mt8186-afe-gpio.h" 14 #include "mt8186-interconnection.h" 60 unsigned int mode) in get_tdm_lrck_width() argument 62 if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B) in get_tdm_lrck_width() 65 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width() 78 static unsigned int get_tdm_ch_per_sdata(unsigned int mode, in get_tdm_ch_per_sdata() argument [all …]
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/Linux-v6.6/sound/soc/codecs/ |
D | tas5720.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * tas5720.c - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier 5 * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com 22 #include <sound/soc-dapm.h> 37 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */ 38 "pvdd", /* Class-D amp and analog power supply (connected). */ 57 struct snd_soc_component *component = dai->component; in tas5720_hw_params() 72 dev_err(component->dev, "unsupported sample rate: %u\n", rate); in tas5720_hw_params() 73 return -EINVAL; in tas5720_hw_params() 79 dev_err(component->dev, "error setting sample rate: %d\n", ret); in tas5720_hw_params() [all …]
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D | pcm3168a.c | 1 // SPDX-License-Identifier: GPL-2.0-only 109 static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" }; 127 /* -100db to 0db, register values 0-54 cause mute */ 128 static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1); 130 /* -100db to 20db, register values 0-14 cause mute */ 131 static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1); 134 SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT, 136 SOC_ENUM("DAC1 Digital Filter roll-off", pcm3168a_d1_roll_off), 137 SOC_ENUM("DAC2 Digital Filter roll-off", pcm3168a_d2_roll_off), 138 SOC_ENUM("DAC3 Digital Filter roll-off", pcm3168a_d3_roll_off), [all …]
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D | tas6424.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 23 #include <sound/soc-dapm.h> 32 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */ 34 "pvdd", /* Class-D amp output FETs supply. */ 52 * DAC digital volumes. From -103.5 to 24 dB in 0.5 dB steps. Note that 53 * setting the gain below -100 dB (register value <0x7) is effectively a MUTE 56 static DECLARE_TLV_DB_SCALE(dac_tlv, -10350, 50, 0); 74 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tas6424_dac_event() [all …]
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D | adau7118.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Analog Devices ADAU7118 8 channel PDM-to-I2S/TDM Converter driver 128 snd_soc_component_get_drvdata(dai->component); in adau7118_set_channel_map() 131 dev_dbg(st->dev, "Set channel map, %d", tx_num); in adau7118_set_channel_map() 134 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_channel_map() 148 snd_soc_component_get_drvdata(dai->component); in adau7118_set_fmt() 152 dev_dbg(st->dev, "Set format, fmt:%d\n", fmt); in adau7118_set_fmt() 156 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_fmt() 162 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_fmt() 168 st->right_j = true; in adau7118_set_fmt() [all …]
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D | arizona.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arizona.c - Wolfson Arizona class device shared support 67 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 69 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 71 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 74 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) 76 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) 78 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) 84 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in arizona_spk_ev() 85 struct arizona *arizona = dev_get_drvdata(component->dev->parent); in arizona_spk_ev() [all …]
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/Linux-v6.6/arch/arm/boot/dts/st/ |
D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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D | stm32mp15xx-dkx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/mfd/st,stpmic1.h> 22 reserved-memory { 23 #address-cells = <1>; 24 #size-cells = <1>; 28 compatible = "shared-dma-pool"; 30 no-map; 34 compatible = "shared-dma-pool"; [all …]
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/Linux-v6.6/sound/soc/rockchip/ |
D | rockchip_i2s_tdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // ALSA SoC Audio Layer - Rockchip I2S/TDM Controller driver 5 // Author: Sugar Zhang <sugar.zhang@rock-chips.com> 9 #include <linux/clk-provider.h> 25 #define DRV_NAME "rockchip-i2s-tdm" 30 #define CLK_PPM_MIN -1000 117 clk_disable_unprepare(i2s_tdm->mclk_tx); in i2s_tdm_disable_unprepare_mclk() 118 clk_disable_unprepare(i2s_tdm->mclk_rx); in i2s_tdm_disable_unprepare_mclk() 119 if (i2s_tdm->mclk_calibrate) { in i2s_tdm_disable_unprepare_mclk() 120 clk_disable_unprepare(i2s_tdm->mclk_tx_src); in i2s_tdm_disable_unprepare_mclk() [all …]
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/Linux-v6.6/sound/soc/fsl/ |
D | fsl_audmix.c | 1 // SPDX-License-Identifier: GPL-2.0 52 /* DIS->DIS, do nothing */ 54 /* DIS->TDM1*/ 55 { .tdms = 1, .clk = 1, .msg = "DIS->TDM1: TDM1 not started!\n" }, 56 /* DIS->TDM2*/ 57 { .tdms = 2, .clk = 2, .msg = "DIS->TDM2: TDM2 not started!\n" }, 58 /* DIS->MIX */ 59 { .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" } 60 }, { /* TDM1->DIS */ 61 { .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" }, [all …]
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/Linux-v6.6/drivers/net/wan/ |
D | fsl_ucc_hdlc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 #include <linux/dma-mapping.h> 54 .mode = UCC_FAST_PROTOCOL_MODE_HDLC, 93 ut_info = priv->ut_info; in uhdlc_init() 94 uf_info = &ut_info->uf_info; in uhdlc_init() 96 if (priv->tsa) { in uhdlc_init() 97 uf_info->tsa = 1; in uhdlc_init() 98 uf_info->ctsp = 1; in uhdlc_init() 99 uf_info->cds = 1; in uhdlc_init() 100 uf_info->ctss = 1; in uhdlc_init() [all …]
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/Linux-v6.6/arch/riscv/boot/dts/starfive/ |
D | jh7110-starfive-visionfive-2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 26 stdout-path = "serial0:115200n8"; 30 timebase-frequency = <4000000>; 38 gpio-restart { 39 compatible = "gpio-restart"; 46 clock-frequency = <74250000>; 50 clock-frequency = <125000000>; [all …]
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/Linux-v6.6/sound/soc/stm/ |
D | stm32_sai_sub.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 10 #include <linux/clk-provider.h> 41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK) 42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE) 47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID) 53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif) 54 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm) 55 #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm) 56 #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata)) [all …]
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/Linux-v6.6/sound/soc/bcm/ |
D | bcm2835-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only 23 * Copyright 2007-2010 Freescale Semiconductor, Inc. 130 unsigned int provider = dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; in bcm2835_i2s_start_clock() 132 if (dev->clk_prepared) in bcm2835_i2s_start_clock() 138 clk_prepare_enable(dev->clk); in bcm2835_i2s_start_clock() 139 dev->clk_prepared = true; in bcm2835_i2s_start_clock() 148 if (dev->clk_prepared) in bcm2835_i2s_stop_clock() 149 clk_disable_unprepare(dev->clk); in bcm2835_i2s_stop_clock() 150 dev->clk_prepared = false; in bcm2835_i2s_stop_clock() 171 regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); in bcm2835_i2s_clear_fifos() [all …]
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/Linux-v6.6/arch/arm/boot/dts/ti/davinci/ |
D | da850-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 12 compatible = "ti,da850-evm", "ti,da850"; 13 model = "DA850/AM1808/OMAP-L138 EVM"; 16 stdout-path = &serial2; 27 backlight: backlight-pwm { 28 pinctrl-names = "default"; 29 pinctrl-0 = <&ecap2_pins>; [all …]
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/Linux-v6.6/sound/soc/tegra/ |
D | tegra210_i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 // tegra210_i2s.c - Tegra210 I2S driver 42 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl() 54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate() 60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate() 67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate() 70 * clock. Below sets sync input clock rate as per bclk, in tegra210_i2s_set_clock_rate() 73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate() 76 "can't set I2S sync input rate %u, err = %d\n", in tegra210_i2s_set_clock_rate() 88 struct device *dev = compnt->dev; in tegra210_i2s_sw_reset() [all …]
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