Home
last modified time | relevance | path

Searched +full:syscon +full:- +full:hdmi (Results 1 – 25 of 65) sorted by relevance

123

/Linux-v5.15/Documentation/devicetree/bindings/display/exynos/
Dexynos_hdmi.txt1 Device-Tree bindings for drm hdmi driver
4 - compatible: value should be one among the following:
5 1) "samsung,exynos4210-hdmi"
6 2) "samsung,exynos4212-hdmi"
7 3) "samsung,exynos5420-hdmi"
8 4) "samsung,exynos5433-hdmi"
9 - reg: physical base address of the hdmi and length of memory mapped
11 - interrupts: interrupt number to the cpu.
12 - hpd-gpios: following information about the hotplug gpio pin.
16 - ddc: phandle to the hdmi ddc node
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI Encoder Device Tree Bindings
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
20 - mediatek,mt2701-hdmi
21 - mediatek,mt7623-hdmi
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
18 g3dsys: syscon@13000000 {
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
21 "syscon";
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
[all …]
Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
9 #include <dt-bindings/power/rk3228-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
45 cluster_a15_opp_table: opp-table0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-1800000000 {
50 opp-hz = /bits/ 64 <1800000000>;
[all …]
Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]
Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a15";
69 clock-names = "cpu";
70 operating-points-v2 = <&cpu0_opp_table>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/media/
Ds5p-cec.txt1 * Samsung HDMI CEC driver
3 The HDMI CEC module is present is Samsung SoCs and its purpose is to
4 handle communication between HDMI connected devices over the CEC bus.
7 - compatible : value should be following
8 "samsung,s5p-cec"
10 - reg : Physical base address of the IP registers and length of memory
13 - interrupts : HDMI CEC interrupt number to the CPU.
14 - clocks : from common clock binding: handle to HDMI CEC clock.
15 - clock-names : from common clock binding: must contain "hdmicec",
17 - samsung,syscon-phandle - phandle to the PMU system controller
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/ti/
Dti,dra7-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
23 - reg: address and length of the register spaces for 'pll1_clkctrl',
25 - clocks: handle to video1 pll clock and video2 pll clock
[all …]
/Linux-v5.15/drivers/gpu/drm/imx/
Ddw_hdmi-imx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
8 #include <linux/mfd/syscon.h>
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14 #include <video/imx-ipu-v3.h>
25 #include "imx-drm.h"
31 struct imx_hdmi *hdmi; member
37 struct dw_hdmi *hdmi; member
43 return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi; in enc_to_imx_hdmi()
[all …]
/Linux-v5.15/drivers/gpu/drm/mediatek/
Dmtk_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/arm-smccc.h>
10 #include <linux/hdmi.h>
14 #include <linux/mfd/syscon.h>
25 #include <sound/hdmi-codec.h>
191 static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) in mtk_hdmi_read() argument
193 return readl(hdmi->regs + offset); in mtk_hdmi_read()
196 static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) in mtk_hdmi_write() argument
198 writel(val, hdmi->regs + offset); in mtk_hdmi_write()
201 static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) in mtk_hdmi_clear_bits() argument
[all …]
/Linux-v5.15/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi14 #include <dt-bindings/clock/mt8173-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/memory/mt8173-larb-port.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/power/mt8173-power.h>
20 #include <dt-bindings/reset/mt8173-resets.h>
21 #include <dt-bindings/gce/mt8173-gce.h>
22 #include <dt-bindings/thermal/thermal.h>
23 #include "mt8173-pinfunc.h"
[all …]
/Linux-v5.15/arch/arm64/boot/dts/rockchip/
Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/clock/
Drockchip,rv1108-cru.txt9 - compatible: should be "rockchip,rv1108-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
22 preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
30 clock-output-names:
31 - "xin24m" - crystal input - required,
32 - "ext_vip" - external VIP clock - optional
33 - "ext_i2s" - external I2S clock - optional
[all …]
Drockchip,rk3328-cru.txt9 - compatible: should be "rockchip,rk3328-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
22 preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be
30 clock-output-names:
31 - "xin24m" - crystal input - required,
32 - "clkin_i2s" - external I2S clock - optional,
33 - "gmac_clkin" - external GMAC clock - optional
[all …]
/Linux-v5.15/drivers/gpu/drm/rockchip/
Ddw_hdmi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/mfd/syscon.h>
38 /* need to be unset if hdmi or i2c should control voltage */
56 * struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
58 * @lcdsel_big: reg value of selecting vop big for HDMI
59 * @lcdsel_lit: reg value of selecting vop little for HDMI
74 struct dw_hdmi *hdmi; member
189 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) in rockchip_hdmi_parse_dt() argument
191 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
193 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
[all …]
Drk3066_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
4 * Zheng Yang <zhengyang@rock-chips.com>
12 #include <linux/mfd/syscon.h>
63 static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset) in hdmi_readb() argument
65 return readl_relaxed(hdmi->regs + offset); in hdmi_readb()
68 static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val) in hdmi_writeb() argument
70 writel_relaxed(val, hdmi->regs + offset); in hdmi_writeb()
73 static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset, in hdmi_modb() argument
76 u8 temp = hdmi_readb(hdmi, offset) & ~msk; in hdmi_modb()
79 hdmi_writeb(hdmi, offset, temp); in hdmi_modb()
[all …]
/Linux-v5.15/drivers/media/cec/platform/s5p/
Ds5p_cec.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* drivers/media/platform/s5p-cec/s5p_cec.h
4 * Samsung S5P HDMI CEC driver
15 #include <linux/mfd/syscon.h>
25 #include "regs-cec.h"
28 #define CEC_NAME "s5p-cec"
/Linux-v5.15/arch/arm64/boot/dts/amlogic/
Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
29 reserved-memory {
[all …]
/Linux-v5.15/drivers/gpu/drm/zte/
Dzx_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/hdmi.h>
13 #include <linux/mfd/syscon.h>
25 #include <sound/hdmi-codec.h>
55 static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset) in hdmi_readb() argument
57 return readl_relaxed(hdmi->mmio + offset * 4); in hdmi_readb()
60 static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val) in hdmi_writeb() argument
62 writel_relaxed(val, hdmi->mmio + offset * 4); in hdmi_writeb()
65 static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset, in hdmi_writeb_mask() argument
70 tmp = hdmi_readb(hdmi, offset); in hdmi_writeb_mask()
[all …]
/Linux-v5.15/arch/arm64/boot/dts/allwinner/
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-tcon-top.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/thermal/thermal.h>
[all …]

123