/Linux-v6.1/sound/drivers/vx/ |
D | vx_uer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 17 * vx_modify_board_clock - tell the board that its clock has been modified 18 * @sync: DSP needs to resynchronize its FIFO 20 static int vx_modify_board_clock(struct vx_core *chip, int sync) in vx_modify_board_clock() argument 26 if (sync) in vx_modify_board_clock() 32 * vx_modify_board_inputs - resync audio inputs 44 * vx_read_one_cbit - read one bit from UER config 52 mutex_lock(&chip->lock); in vx_read_one_cbit() 53 if (chip->type >= VX_TYPE_VXPOCKET) { in vx_read_one_cbit() 62 mutex_unlock(&chip->lock); in vx_read_one_cbit() [all …]
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/Linux-v6.1/drivers/tty/serial/ |
D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 31 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument 32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument 90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */ 106 #define SYNC_ENAB 0 /* Sync Modes Enable */ 111 #define MONSYNC 0 /* 8 Bit Sync character */ 112 #define BISYNC 0x10 /* 16 bit sync character */ 113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ 114 #define EXTSYNC 0x30 /* External Sync Mode */ 126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ [all …]
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D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 23 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument 24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument 82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */ 98 #define SYNC_ENAB 0 /* Sync Modes Enable */ 103 #define MONSYNC 0 /* 8 Bit Sync character */ 104 #define BISYNC 0x10 /* 16 bit sync character */ 105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ 106 #define EXTSYNC 0x30 /* External Sync Mode */ 118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ [all …]
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D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 38 * Per-SCC state for locking and the interrupt handler. 52 #define ZS_BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument 53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument 109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */ 124 #define SYNC_ENAB 0 /* Sync Modes Enable */ 130 #define MONSYNC 0 /* 8 Bit Sync character */ 131 #define BISYNC 0x10 /* 16 bit sync character */ 132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ 133 #define EXTSYNC 0x30 /* External Sync Mode */ [all …]
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D | pmac_zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 25 * of "escc" node (ie. ch-a or ch-b) 64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A() 66 return uap->mate; in pmz_get_port_A() 78 writeb(reg, port->control_reg); in read_zsreg() 79 return readb(port->control_reg); in read_zsreg() 85 writeb(reg, port->control_reg); in write_zsreg() 86 writeb(value, port->control_reg); in write_zsreg() 91 return readb(port->data_reg); in read_zsdata() 96 writeb(data, port->data_reg); in write_zsdata() [all …]
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/Linux-v6.1/sound/soc/fsl/ |
D | fsl_sai.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 // Copyright 2012-2015 Freescale Semiconductor, Inc. 23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 27 #include "imx-pcm.h" 45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream 58 /* current dir in async mode while opposite dir in sync mode */ in fsl_sai_dir_is_synced() 59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced() 66 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state() 69 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state() 73 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/regulator/ |
D | maxim,max8952.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 - $ref: regulator.yaml# 19 max8952,default-mode: 25 max8952,dvs-mode-microvolt: 35 max8952,en-gpio: 40 max8952,ramp-speed: 46 - 0: 32mV/us [all …]
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/Linux-v6.1/sound/soc/stm/ |
D | stm32_sai_sub.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 10 #include <linux/clk-provider.h> 41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK) 42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE) 47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID) 53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif) 54 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm) 55 #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm) 56 #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata)) [all …]
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/Linux-v6.1/drivers/net/ethernet/intel/igc/ |
D | igc_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 88 /* Loop limit on how long we wait for auto-negotiation to complete */ 170 /* 1000BASE-T Control Register */ 174 /* 1000BASE-T Status Register */ 238 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */ 262 #define IGC_ICR_TS BIT(19) /* Time Sync Interrupt */ 281 #define IGC_IMS_DOUTSYNC IGC_ICR_DOUTSYNC /* NIC DMA out of sync */ 285 #define IGC_IMS_TS IGC_ICR_TS /* Time Sync Interrupt */ 287 #define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */ 294 #define IGC_ICR_DOUTSYNC 0x10000000 /* NIC DMA out of sync */ [all …]
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/Linux-v6.1/sound/soc/codecs/ |
D | madera.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and 18 #include <linux/irqchip/irq-madera.h> 22 #include <sound/madera-pdata.h> 24 #include <dt-bindings/sound/madera.h> 143 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 145 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 147 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 150 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) 152 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) [all …]
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/Linux-v6.1/include/linux/ |
D | omap-gpmc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 6 #include <linux/platform_data/gpmc-omap.h> 15 * gpmc_nand_ops - Interface between NAND and GPMC 34 * gpmc_omap_onenand_set_timings - set optimized sync timings. 36 * @freq: Chip frequency 40 * Sets optimized timings for the @cs region based on @freq and @latency. 43 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, 55 int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq, in gpmc_omap_onenand_set_timings() argument 59 return -EINVAL; in gpmc_omap_onenand_set_timings()
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/Linux-v6.1/drivers/iio/imu/ |
D | adis16475.c | 1 // SPDX-License-Identifier: GPL-2.0 84 const struct adis16475_sync *sync; member 132 struct adis16475 *st = file->private_data; in adis16475_show_firmware_revision() 138 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev); in adis16475_show_firmware_revision() 158 struct adis16475 *st = file->private_data; in adis16475_show_firmware_date() 164 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year); in adis16475_show_firmware_date() 168 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md); in adis16475_show_firmware_date() 172 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff, in adis16475_show_firmware_date() 191 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial); in adis16475_show_serial_number() 208 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id); in adis16475_show_product_id() [all …]
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/Linux-v6.1/sound/soc/ti/ |
D | davinci-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 * based on davinci-mcasp.c DT support 31 #include "edma-pcm.h" 32 #include "davinci-i2s.h" 34 #define DRV_NAME "davinci-i2s" 39 * - This driver supports the "Audio Serial Port" (ASP), 42 * - But it labels it a "Multi-channel Buffered Serial Port" 44 * backward-compatible, possibly explaining that confusion. 46 * - OMAP chips have a controller called McBSP, which is 49 * - Newer DaVinci chips have a controller called McASP, [all …]
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/Linux-v6.1/tools/testing/selftests/net/forwarding/ |
D | tsn_lib.sh | 2 # SPDX-License-Identifier: GPL-2.0 3 # Copyright 2021-2022 NXP 13 # https://github.com/vladimiroltean/tsn-scripts 14 # WARNING: isochron versions pre-1.0 are unstable, 28 if ! [ -z "${uds_address}" ]; then 29 extra_args="${extra_args} -z ${uds_address}" 34 chrt -f 10 phc2sys -m \ 35 -a -rr \ 36 --step_threshold 0.00002 \ 37 --first_step_threshold 0.00002 \ [all …]
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/Linux-v6.1/tools/testing/selftests/timers/ |
D | raw_skew.c | 9 * $ gcc raw_skew.c -o raw_skew -lrt 36 __x < 0 ? -(-__x >> __s) : __x >> __s; \ 42 val = -val; in llabs() 66 return end_ns - start_ns; in diff_timespec() 102 return -1; in main() 127 eppm = ((delta2-delta1)*NSEC_PER_SEC)/interval; in main() 128 eppm = -eppm; in main() 131 /* Avg the two actual freq samples adjtimex gave us */ in main() 132 ppm = (tx1.freq + tx2.freq) * 1000 / 2; in main() 133 ppm = (long long)tx1.freq * 1000; in main() [all …]
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/Linux-v6.1/drivers/video/fbdev/i810/ |
D | i810_gtf.c | 1 /*-*- linux-c -*- 2 * linux/drivers/video/i810_main.h -- Intel 810 Non-discrete Video Timings 20 * FIFO and Watermark tables - based almost wholly on i810_wmark.c in 26 u32 freq; member 116 * i810fb_encode_registers - encode @var to hardware register values 128 u8 __iomem *mmio = par->mmio_start_virtual; in i810fb_encode_registers() 133 n = ((xres + var->right_margin + var->hsync_len + in i810fb_encode_registers() 134 var->left_margin) >> 3) - 5; in i810fb_encode_registers() 135 par->regs.cr00 = (u8) n; in i810fb_encode_registers() 136 par->regs.cr35 = (u8) ((n >> 8) & 1); in i810fb_encode_registers() [all …]
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/Linux-v6.1/arch/mips/ar7/ |
D | clock.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 18 #include <linux/clk-provider.h> 21 #include <asm/mach-ar7/ar7.h> 103 int i, j, k, freq, res = target; in approximate() local 107 freq = abs(base / j * i / k - target); in approximate() 108 if (freq < res) { in approximate() 109 res = freq; in approximate() 166 u32 ctrl = readl(&clock->ctrl); in tnetd7300_get_clock() 167 u32 pll = readl(&clock->pll); in tnetd7300_get_clock() 197 (base_clock * (mul - 1)) >> 2; in tnetd7300_get_clock() [all …]
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/Linux-v6.1/drivers/devfreq/ |
D | sun8i-a33-mbus.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 // Copyright (C) 2020-2021 Samuel Holland <samuel@sholland.org> 25 #define MBUS_TMR_PERIOD(x) ((x) - 1) 28 #define MBUS_PMU_CFG_PERIOD(x) (((x) - 1) << 16) 108 return readl_relaxed(priv->reg_mbus + MBUS_TOTAL_BWCR); in sun8i_a33_mbus_get_peak_bw() 115 /* All PMU counters are cleared on a disable->enable transition. */ in sun8i_a33_mbus_restart_pmu_counters() 117 priv->reg_mbus + MBUS_PMU_CFG); in sun8i_a33_mbus_restart_pmu_counters() 119 priv->reg_mbus + MBUS_PMU_CFG); in sun8i_a33_mbus_restart_pmu_counters() 130 * ------------- * ------------ * -------- in sun8i_a33_mbus_update_nominal_bw() 133 priv->nominal_bw = ddr_freq_mhz * pmu_period * priv->data_width / 1024; in sun8i_a33_mbus_update_nominal_bw() [all …]
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/Linux-v6.1/drivers/scsi/ |
D | mac53c94.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 142 * Encoding for sync transfer period. 155 * Encoding for sync offset. 175 #define CLKF_VAL(freq) ((((freq) + 4999999) / 5000000) & CLKF_MASK) argument 182 #define TEST_TRISTATE 4 /* tristate (hi-z) test mode */
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/Linux-v6.1/drivers/video/fbdev/geode/ |
D | lxfb_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2006-2007, Advanced Micro Devices,Inc. 23 /* This is the complete list of PLL frequencies that we can set - 25 * freq is the frequency of the dotclock * 1000 (for example, 32 unsigned int freq; member 163 unsigned int freq, i; in lx_set_clock() local 165 freq = (unsigned int) (1000000000 / info->var.pixclock); in lx_set_clock() 167 min = abs(pll_table[0].freq - freq); in lx_set_clock() 170 diff = abs(pll_table[i].freq - freq); in lx_set_clock() 182 struct lxfb_par *par = info->par; in lx_graphics_disable() [all …]
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/Linux-v6.1/drivers/net/ethernet/socionext/ |
D | netsec.c | 1 // SPDX-License-Identifier: GPL-2.0+ 247 #define NETSEC_RX_BUF_SIZE (PAGE_SIZE - NETSEC_RX_BUF_NON_DATA) 307 u32 freq; member 333 writel(val, priv->ioaddr + reg_addr); in netsec_write() 338 return readl(priv->ioaddr + reg_addr); in netsec_read() 346 static u32 netsec_clk_type(u32 freq) in netsec_clk_type() argument 348 if (freq < MHZ(35)) in netsec_clk_type() 350 if (freq < MHZ(60)) in netsec_clk_type() 352 if (freq < MHZ(100)) in netsec_clk_type() 354 if (freq < MHZ(150)) in netsec_clk_type() [all …]
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/Linux-v6.1/drivers/staging/media/deprecated/saa7146/av7110/ |
D | av7110_v4l.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * av7110_v4l.c: av7110 video4linux interface for DVB and Siemens DVB-C analog module 5 * Copyright (C) 1999-2002 Ralph Metzler 9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de> 32 switch (av7110->adac_type) { in msp_writereg() 43 if (i2c_transfer(&av7110->i2c_adap, &msgs, 1) != 1) { in msp_writereg() 44 dprintk(1, "dvb-ttpci: failed @ card %d, %u = %u\n", in msp_writereg() 45 av7110->dvb_adapter.num, reg, val); in msp_writereg() 46 return -EIO; in msp_writereg() 60 switch (av7110->adac_type) { in msp_readreg() [all …]
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/Linux-v6.1/drivers/scsi/aic7xxx/ |
D | aic7xxx_proc.c | 2 * Copyright (c) 2000-2001 Adaptec Inc. 16 * 3. Neither the names of the above-listed copyright holders nor the names 37 * String handling code courtesy of Gerard Roudier's <groudier@club-internet.fr> 61 { 0x08, 625 }, /* FAST-160 */ 62 { 0x09, 1250 }, /* FAST-80 */ 63 { 0x0a, 2500 }, /* FAST-40 40MHz */ 64 { 0x0b, 3030 }, /* FAST-40 33MHz */ 65 { 0x0c, 5000 } /* FAST-20 */ 70 * sync period factor. 97 u_int freq; in ahc_format_transinfo() local [all …]
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D | aic79xx_proc.c | 2 * Copyright (c) 2000-2001 Adaptec Inc. 16 * 3. Neither the names of the above-listed copyright holders nor the names 37 * String handling code courtesy of Gerard Roudier's <groudier@club-internet.fr> 60 { 0x08, 625 }, /* FAST-160 */ 61 { 0x09, 1250 }, /* FAST-80 */ 62 { 0x0a, 2500 }, /* FAST-40 40MHz */ 63 { 0x0b, 3030 }, /* FAST-40 33MHz */ 64 { 0x0c, 5000 } /* FAST-20 */ 69 * sync period factor. 96 u_int freq; in ahd_format_transinfo() local [all …]
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/Linux-v6.1/drivers/clocksource/ |
D | dw_apb_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-only 51 return readl(timer->base + offs); in apbt_readl() 57 writel(val, timer->base + offs); in apbt_writel() 62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed() 68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed() 80 * dw_apb_clockevent_pause() - stop the clock_event_device from running 86 disable_irq(dw_ced->timer.irq); in dw_apb_clockevent_pause() 87 apbt_disable_int(&dw_ced->timer); in dw_apb_clockevent_pause() 100 if (!evt->event_handler) { in dw_apb_clockevent_irq() 105 if (dw_ced->eoi) in dw_apb_clockevent_irq() [all …]
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