Searched +full:sun50i +full:- +full:h6 +full:- +full:pwm (Results 1 – 7 of 7) sorted by relevance
| /Linux-v5.10/Documentation/devicetree/bindings/pwm/ |
| D | allwinner,sun4i-a10-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 PWM Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#pwm-cells":
19 - const: allwinner,sun4i-a10-pwm
20 - const: allwinner,sun5i-a10s-pwm
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| /Linux-v5.10/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-h6.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-tcon-top.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/thermal/thermal.h>
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| /Linux-v5.10/drivers/pwm/ |
| D | pwm-sun4i.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * - When outputing the source clock directly, the PWM logic will be bypassed
22 #include <linux/pwm.h>
48 #define PWM_PRD(prd) (((prd) - 1) << 16)
103 return readl(chip->base + offset); in sun4i_pwm_readl()
109 writel(val, chip->base + offset); in sun4i_pwm_writel()
113 struct pwm_device *pwm, in sun4i_pwm_get_state() argument
121 clk_rate = clk_get_rate(sun4i_pwm->clk); in sun4i_pwm_get_state()
126 * PWM chapter in H6 manual has a diagram which explains that if bypass in sun4i_pwm_get_state()
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| /Linux-v5.10/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-h6-r.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
18 #include "ccu-sun50i-h6-r.h"
26 "iosc", "pll-periph0" };
52 static CLK_FIXED_FACTOR_HW(r_ahb_clk, "r-ahb", &ar100_clk.common.hw, 1, 1, 0);
54 static SUNXI_CCU_M(r_apb1_clk, "r-apb1", "r-ahb", 0x00c, 0, 2, 0);
70 .hw.init = CLK_HW_INIT_PARENTS("r-apb2",
81 * "Allwinner H6 V200 User Manual V1.1"; and the parent APB buses are verified
84 static SUNXI_CCU_GATE(r_apb1_timer_clk, "r-apb1-timer", "r-apb1",
86 static SUNXI_CCU_GATE(r_apb1_twd_clk, "r-apb1-twd", "r-apb1",
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| D | ccu-sun50i-h6.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
23 #include "ccu-sun50i-h6.h"
42 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
58 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M",
75 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
92 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M",
107 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M",
129 .hw.init = CLK_HW_INIT("pll-video0", "osc24M",
147 .hw.init = CLK_HW_INIT("pll-video1", "osc24M",
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| /Linux-v5.10/drivers/pinctrl/sunxi/ |
| D | pinctrl-sun50i-h6.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner H6 SoC pinctrl driver.
14 #include "pinctrl-sunxi.h"
347 SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
604 { .compatible = "allwinner,sun50i-h6-pinctrl", },
611 .name = "sun50i-h6-pinctrl",
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| /Linux-v5.10/ |
| D | MAINTAINERS | 9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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