Searched +full:strobe +full:- +full:polarity +full:- +full:high (Results 1 – 25 of 33) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/regulator/ |
D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 16 There're still four pins for camera control, two inputs (strobe and vsync), 17 the others for outputs (fsin1 and fsin2). Strobe input to start the current 27 wakeup-source: true 32 enable-gpios: 36 richtek,ld-pulse-delay-us: [all …]
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/Linux-v6.1/drivers/media/platform/ti/omap3isp/ |
D | omap3isp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * TI OMAP3 ISP - Bus Configuration 25 * struct isp_parallel_cfg - Parallel interface configuration 27 * 0 - CAMEXT[13:0] -> CAM[13:0] 28 * 2 - CAMEXT[13:2] -> CAM[11:0] 29 * 4 - CAMEXT[13:4] -> CAM[9:0] 30 * 6 - CAMEXT[13:6] -> CAM[7:0] 31 * @clk_pol: Pixel clock polarity 32 * 0 - Sample on rising edge, 1 - Sample on falling edge 33 * @hs_pol: Horizontal synchronization polarity [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/usb/ |
D | ci-hdrc-usb2.txt | 4 - compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" 13 "fsl,imx7ulp-usb" [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 47 non-removable: [all …]
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/Linux-v6.1/include/media/ |
D | v4l2-mediabus.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 11 #include <linux/v4l2-mediabus.h> 46 * Signal polarity flags 59 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */ 61 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */ 63 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */ 70 /* Clock non-continuous mode support. */ 76 * struct v4l2_mbus_config_mipi_csi2 - MIPI CSI-2 data bus configuration 81 * @lane_polarities: polarity of the lanes. The order is the same of 93 * struct v4l2_mbus_config_parallel - parallel data bus configuration [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sakari Ailus <sakari.ailus@linux.intel.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 29 #address-cells = <1>; 30 #size-cells = <0>; 45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is 49 specify #address-cells, #size-cells properties independently for the 'port' [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/bus/ |
D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips, 15 - Linus Walleij <linus.walleij@linaro.org> 19 pattern: '^bus@[0-9a-f]+$' 23 - enum: 24 - intel,ixp42x-expansion-bus-controller 25 - intel,ixp43x-expansion-bus-controller [all …]
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/Linux-v6.1/drivers/parport/ |
D | ieee1284_ops.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* IEEE-1284 operations for parport. 5 * they are used by the low-level drivers. If they have a special way 7 * the function pointers in port->ops); if not, they can just use these 13 * Fixed AUTOFD polarity in ecp_forward_to_reverse(). Fred Barnes, 1999 31 * One-way data transfer functions. * 43 struct pardevice *dev = port->physport->cad; in parport_ieee1284_write_compat() 47 if (port->irq != PARPORT_IRQ_NONE) { in parport_ieee1284_write_compat() 52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat() 56 unsigned long expire = jiffies + dev->timeout; in parport_ieee1284_write_compat() [all …]
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/Linux-v6.1/drivers/auxdisplay/ |
D | panel.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu> 5 * Copyright (C) 2016-2017 Glider bvba 10 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit 15 * data output pins or to the ground. The combinations have to be hard-coded 22 * - the initialization/deinitialization process is very dirty and should 26 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs) 27 * - make the LCD a part of a virtual screen of Vx*Vy 28 * - make the inputs list smp-safe 29 * - change the keyboard to a double mapping : signals -> key_id -> values [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 4 # see Documentation/kbuild/kconfig-language.rst. 22 This is the base system for character-based LCD displays. 31 This is the core support for single-line character displays, to be 66 and built-in as well (Y). 121 If you have a Crystalfontz 128x64 2-color LCD, cfag12864b Series, 125 check Documentation/admin-guide/auxdisplay/cfag12864b.rst 150 Be careful modifying this value to a very high value: 211 Say Y here if you have an HD44780 or KS-0074 LCD connected to your 212 parallel port. This driver also features 4 and 6-key keypads. The LCD [all …]
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/Linux-v6.1/drivers/regulator/ |
D | rtmv20-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0+ 75 gpiod_set_value(priv->enable_gpio, 1); in rtmv20_lsw_enable() 80 /* HW re-enable, disable cache only and sync regcache here */ in rtmv20_lsw_enable() 81 regcache_cache_only(priv->regmap, false); in rtmv20_lsw_enable() 82 ret = regcache_sync(priv->regmap); in rtmv20_lsw_enable() 99 regcache_cache_only(priv->regmap, true); in rtmv20_lsw_disable() 100 regcache_mark_dirty(priv->regmap); in rtmv20_lsw_disable() 102 gpiod_set_value(priv->enable_gpio, 0); in rtmv20_lsw_disable() 113 return -EINVAL; in rtmv20_lsw_set_current_limit() 118 sel = (max_uA - RTMV20_LSW_MINUA) / RTMV20_LSW_STEPUA; in rtmv20_lsw_set_current_limit() [all …]
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/Linux-v6.1/arch/arm64/boot/dts/rockchip/ |
D | rk3399-sapphire.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "dt-bindings/pwm/pwm.h" 7 #include "dt-bindings/input/input.h" 9 #include "rk3399-opp.dtsi" 12 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; [all …]
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D | rk3399pro-vmarc-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/pwm/pwm.h> 13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; 20 vcc3v3_pcie: vcc-pcie-regulator { 21 compatible = "regulator-fixed"; 22 enable-active-high; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pcie_pwr>; [all …]
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D | rk3399-rock-pi-4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pwm/pwm.h> 12 #include "rk3399-opp.dtsi" 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; [all …]
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D | rk3399-leez-p710.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 11 #include "rk3399-opp.dtsi" 24 stdout-path = "serial2:1500000n8"; 27 clkin_gmac: external-gmac-clock { 28 compatible = "fixed-clock"; 29 clock-frequency = <125000000>; [all …]
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D | rk3399-hugsun-x99.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /dts-v1/; 3 #include <dt-bindings/pwm/pwm.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/interrupt-controller/irq.h> 7 #include "rk3399-opp.dtsi" 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; [all …]
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D | rk3399-nanopi4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * RK3399-based FriendlyElec boards device tree source 14 /dts-v1/; 15 #include <dt-bindings/input/linux-event-codes.h> 17 #include "rk3399-opp.dtsi" 27 stdout-path = "serial2:1500000n8"; 30 clkin_gmac: external-gmac-clock { 31 compatible = "fixed-clock"; 32 clock-frequency = <125000000>; 33 clock-output-names = "clkin_gmac"; [all …]
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D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 19 stdout-path = "serial2:115200n8"; 28 * - Rails that only connect to the EC (or devices that the EC talks to) 30 * - Rails _are_ included if the rails go to the AP even if the AP 39 * - The EC controls the enable and the EC always enables a rail as 41 * - The rails are actually connected to each other by a jumper and 46 ppvar_sys: ppvar-sys { [all …]
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D | rk3399-firefly.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/usb/pd.h> 12 #include "rk3399-opp.dtsi" 15 model = "Firefly-RK3399 Board"; 16 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 25 stdout-path = "serial2:1500000n8"; [all …]
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D | rk3399-rock960.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include "rk3399-opp.dtsi" 10 #include <dt-bindings/interrupt-controller/irq.h> 19 sdio_pwrseq: sdio-pwrseq { 20 compatible = "mmc-pwrseq-simple"; 22 clock-names = "ext_clock"; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&wifi_enable_h>; 25 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 28 vcc12v_dcin: vcc12v-dcin { [all …]
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D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/pwm/pwm.h" 9 #include "dt-bindings/input/input.h" 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "dt-bindings/usb/pd.h" 13 #include "rk3399-opp.dtsi" 17 compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399"; 26 stdout-path = "serial2:1500000n8"; 29 clkin_gmac: external-gmac-clock { [all …]
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/Linux-v6.1/drivers/media/v4l2-core/ |
D | v4l2-fwnode.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * formerly was located in v4l2-of.c. 11 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. 27 #include <media/v4l2-async.h> 28 #include <media/v4l2-fwnode.h> 29 #include <media/v4l2-subdev.h> 43 "MIPI CSI-2 C-PHY", 47 "MIPI CSI-1", 55 "MIPI CSI-2 D-PHY", 89 return conv ? conv->mbus_type : V4L2_MBUS_INVALID; in v4l2_fwnode_bus_type_to_mbus() [all …]
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/Linux-v6.1/drivers/comedi/drivers/ |
D | addi_apci_1500.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module. 6 * ADDI-DATA GmbH 8 * D-77833 Ottersweier 9 * Tel: +19(0)7223/9493-0 10 * Fax: +49(0)7223/9493-92 11 * http://www.addi-data.com 12 * info@addi-data.com 23 * PCI Bar 0 Register map (devpriv->amcc) 28 * PCI Bar 1 Register map (dev->iobase) [all …]
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/Linux-v6.1/include/uapi/linux/ |
D | comedi.h | 1 /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */ 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org> 32 * NOTE: 'comedi_config --init-data' is deprecated 40 /* length of nth chunk of firmware data -*/ 78 /* counters -- these are arbitrary values */ 120 /* try to use a real-time interrupt while performing command */ 123 /* wake up on end-of-scan events */ 166 #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */ 179 #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */ [all …]
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/Linux-v6.1/arch/arm/mach-sa1100/include/mach/ |
D | SA-1100.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * FILE SA-1100.h 9 * System StrongARM SA-1100 12 * SA-1100 microprocessor (Advanced RISC Machine (ARM) 14 * StrongARM SA-1100 data sheet version 2.2. 21 #error You must include hardware.h not SA-1100.h 91 * Controller (UDC) Control/Status register end-point 0 94 * Controller (UDC) Control/Status register end-point 1 97 * Controller (UDC) Control/Status register end-point 2 100 * Controller (UDC) Data register end-point 0 [all …]
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