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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Drenesas,usb3-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
[all …]
Dphy-miphy28lp.txt8 - compatible : Should be "st,miphy28lp-phy".
9 - st,syscfg : Should be a phandle of the system configuration register group
12 Required nodes : A sub-node is required for each channel the controller
13 provides. Address range information including the usual
14 'reg' and 'reg-names' properties are used inside these
19 - #phy-cells : Should be 1 (See second example)
21 - PHY_TYPE_SATA
22 - PHY_TYPE_PCI
23 - PHY_TYPE_USB3
24 - reg : Address and length of the register set for the device.
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dti,cdce925.txt6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - compatible: Shall be one of the following:
16 - "ti,cdce913": 1-PLL, 3 Outputs
17 - "ti,cdce925": 2-PLL, 5 Outputs
18 - "ti,cdce937": 3-PLL, 7 Outputs
19 - "ti,cdce949": 4-PLL, 9 Outputs
20 - reg: I2C device address.
21 - clocks: Points to a fixed parent clock that provides the input frequency.
22 - #clock-cells: From common clock bindings: Shall be 1.
25 - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a
[all …]
/Linux-v5.15/drivers/spi/
Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
26 /* SSC registers */
34 /* SSC Control */
49 /* SSC Interrupt Enable */
55 /* SSC SPI Controller */
60 /* SSC SPI current transaction */
75 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
78 count = spi_st->words_remaining; in ssc_write_tx_fifo()
81 if (spi_st->tx_ptr) { in ssc_write_tx_fifo()
[all …]
/Linux-v5.15/sound/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 This driver requires the Atmel SSC driver for sound sink, a
25 called snd-at73c213.
31 range 8000 50000
/Linux-v5.15/drivers/phy/st/
Dphy-miphy28lp.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <dt-bindings/phy/phy.h>
170 * 0: 30MHz crystal clk - 1: 100MHz ext clk routed through MiPHY1
172 * 1: 30MHz crystal clk - 0: 100MHz ext clk routed through MiPHY1
210 bool ssc; member
237 static char *PHY_TYPE_name[] = { "sata-up", "pcie-up", "", "usb3-up" };
366 void __iomem *base = miphy_phy->base; in miphy28lp_set_reset()
377 /* Bringing the MIPHY-CPU registers out of reset */ in miphy28lp_set_reset()
378 if (miphy_phy->type == PHY_TYPE_PCIE) { in miphy28lp_set_reset()
390 void __iomem *base = miphy_phy->base; in miphy28lp_pll_calibration()
[all …]
/Linux-v5.15/block/
Dopal_proto.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * SPC-4 section
202 /* Locking state for a locking range */
263 * Opal SSC Documentation
317 * bits 6-7: reserved
349 * bits 1-6: reserved
360 * Enterprise SSC Feature
368 * bits 1-6: reserved
369 * bit 0: range crossing
399 * bits 3-7: reserved
[all …]
Dsed-opal.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <uapi/linux/sed-opal.h>
20 #include <linux/sed-opal.h>
175 * TCG Storage SSC Methods.
272 u8 flags = tper->supported_features; in check_tper()
276 tper->supported_features); in check_tper()
286 u8 sup_feat = lfeat->supported_features; in check_mbrenabled()
294 u32 nlo = be32_to_cpu(sum->num_locking_objects); in check_sum()
310 return be16_to_cpu(v100->baseComID); in get_comid_v100()
317 return be16_to_cpu(v200->baseComID); in get_comid_v200()
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/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-platform-dptf4 Contact: linux-acpi@vger.kernel.org
6 (RO) The charger type - Traditional, Hybrid or NVDC.
11 Contact: linux-acpi@vger.kernel.org
19 Contact: linux-acpi@vger.kernel.org
27 Contact: linux-acpi@vger.kernel.org
33 - 0x00 = DC
34 - 0x01 = AC
35 - 0x02 = USB
36 - 0x03 = Wireless Charger
43 Contact: linux-acpi@vger.kernel.org
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/Linux-v5.15/drivers/phy/renesas/
Dphy-rcar-gen3-usb3.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car Gen3 for USB3.0 PHY driver
65 writew(val, r->base + USB30_CLKSET1); in write_clkset1_for_usb_extal()
72 switch (r->ssc_range) { in rcar_gen3_phy_usb3_enable_ssc()
83 dev_err(&r->phy->dev, "%s: unsupported range (%x)\n", __func__, in rcar_gen3_phy_usb3_enable_ssc()
84 r->ssc_range); in rcar_gen3_phy_usb3_enable_ssc()
88 writew(val, r->base + USB30_SSC_SET); in rcar_gen3_phy_usb3_enable_ssc()
94 if (r->ssc_range) in rcar_gen3_phy_usb3_select_usb_extal()
97 r->base + USB30_CLKSET0); in rcar_gen3_phy_usb3_select_usb_extal()
98 writew(PHY_ENABLE_RESET_EN, r->base + USB30_PHY_ENABLE); in rcar_gen3_phy_usb3_select_usb_extal()
[all …]
/Linux-v5.15/drivers/gpu/drm/bridge/
Dparade-ps8622.c1 // SPDX-License-Identifier: GPL-2.0-only
69 struct i2c_adapter *adap = client->adapter; in ps8622_set()
73 msg.addr = client->addr + page; in ps8622_set()
81 client->addr + page, reg, val, ret); in ps8622_set()
87 struct i2c_client *cl = ps8622->client; in ps8622_send_config()
138 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config()
148 /* Gitune=-37% */ in ps8622_send_config()
168 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config()
180 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
185 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
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/Linux-v5.15/Documentation/scsi/
DFlashPoint.rst1 .. SPDX-License-Identifier: GPL-2.0
17 FREMONT, CA, -- October 8, 1996 -- Mylex Corporation has expanded Linux
33 Linux is a freely-distributed implementation of UNIX for Intel x86, Sun
35 machines. It supports a wide range of software, including the X Window
37 http://www.linux.org and http://www.ssc.com/.
55 and system boards. Through its wide range of RAID controllers and its
71 510/796-6100
78 BusLogic FlashPoint LT/BT-948 Upgrade Program
82 BusLogic FlashPoint LW/BT-958 Upgrade Program
99 customers to make sure the BT-946C/956C MultiMaster cards would still be
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/Linux-v5.15/drivers/clk/tegra/
Dclk.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <linux/clk-provider.h>
73 * struct tegra_clk_sync_source - external clock source from codec
75 * @hw: handle between common and hardware-specific interfaces
95 * struct tegra_clk_frac_div - fractional divider clock
97 * @hw: handle between common and hardware-specific interfaces
99 * @flags: hardware-specific flags
106 * TEGRA_DIVIDER_ROUND_UP - This flags indicates to round up the divider value.
107 * TEGRA_DIVIDER_FIXED - Fixed rate PLL dividers has addition override bit, this
109 * TEGRA_DIVIDER_INT - Some modules can not cope with the duty cycle when
[all …]
Dclk-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/tegra210-car.h>
18 #include <dt-bindings/reset/tegra210-car.h>
23 #include "clk-id.h"
264 * SDM fractional divisor is 16-bit 2's complement signed number within
265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned
266 * 16-bit value, with "0" divisor mapped to 0xFFFF. Data "0" is used to
274 /* This macro returns ndiv effective scaled to SDM range */
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_14nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
17 * DSI PLL 14nm - clock diagram (eg: DSI0):
22 * +----+ | +----+
23 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte
24 * +----+ | +----+
26 * | +----+ |
27 * o---| /2 |--o--|\
28 * | +----+ | \ +----+
29 * | | |--| n2 |-- dsi0pll
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dpll.c1 // SPDX-License-Identifier: MIT
179 * the range value for them is (actual_value - 2).
292 * Platform specific helpers to calculate the port PLL loopback- (clock.m),
293 * and post-divider (clock.p) values, pre- (clock.vco) and post-divided fast
297 * divided-down version of it.
302 clock->m = clock->m2 + 2; in pnv_calc_dpll_params()
303 clock->p = clock->p1 * clock->p2; in pnv_calc_dpll_params()
304 if (WARN_ON(clock->n == 0 || clock->p == 0)) in pnv_calc_dpll_params()
306 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in pnv_calc_dpll_params()
307 clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); in pnv_calc_dpll_params()
[all …]
Dintel_display.c2 * Copyright © 2006-2007 Intel Corporation
30 #include <linux/intel-iommu.h>
33 #include <linux/dma-resv.h>
137 #define i915_is_dpt(vm) ((vm)->is_dpt)
147 #define dpt_total_entries(dpt) ((dpt)->vm.total >> PAGE_SHIFT)
161 gen8_pte_t __iomem *base = dpt->iomem; in dpt_insert_page()
164 vm->pte_encode(addr, level, flags)); in dpt_insert_page()
173 gen8_pte_t __iomem *base = dpt->iomem; in dpt_insert_entries()
174 const gen8_pte_t pte_encode = vm->pte_encode(0, level, flags); in dpt_insert_entries()
184 i = vma->node.start / I915_GTT_PAGE_SIZE; in dpt_insert_entries()
[all …]
Dintel_bios.c53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
86 return _get_blocksize(block_data - 3); in get_blocksize()
99 index += bdb->header_size; in find_section()
100 total = bdb->bdb_size; in find_section()
124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | in fill_detail_timing_data()
125 dvo_timing->hactive_lo; in fill_detail_timing_data()
126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + in fill_detail_timing_data()
127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); in fill_detail_timing_data()
128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + in fill_detail_timing_data()
129 ((dvo_timing->hsync_pulse_width_hi << 8) | in fill_detail_timing_data()
[all …]
/Linux-v5.15/drivers/gpu/drm/gma500/
Dcdv_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
56 /* The single-channel range is 25-112Mhz, and dual-channel
57 * is 80-224Mhz. Prefer single channel as much as possible.
117 ret__ = -ETIMEDOUT; \
216 int pipe = gma_crtc->pipe; in cdv_dpll_set_clock_cdv()
271 m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
287 n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
289 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
292 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
[all …]
/Linux-v5.15/drivers/net/ethernet/neterion/vxge/
Dvxge-traffic.h10 * vxge-traffic.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
12 * Copyright(c) 2002-2010 Exar Corp.
17 #include "vxge-reg.h"
18 #include "vxge-version.h"
72 * enum vxge_hw_event- Enumerates slow-path HW events.
83 * @VXGE_HW_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish
84 * slot-freeze from the rest critical events (e.g. ECC) when it is
85 * impossible to PIO read "through" the bus, i.e. when getting all-foxes.
87 * enum vxge_hw_event enumerates slow-path HW eventis.
114 * struct vxge_hw_mempool_dma - Represents DMA objects passed to the
[all …]
/Linux-v5.15/drivers/clk/ti/
Ddpll3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP3/4 - specific DPLL control functions
5 * Copyright (C) 2009-2010 Texas Instruments, Inc.
6 * Copyright (C) 2009-2010 Nokia Corporation
46 /* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
52 dd = clk->dpll_data; in _omap3_dpll_write_clken()
54 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in _omap3_dpll_write_clken()
55 v &= ~dd->enable_mask; in _omap3_dpll_write_clken()
56 v |= clken_bits << __ffs(dd->enable_mask); in _omap3_dpll_write_clken()
57 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in _omap3_dpll_write_clken()
[all …]
/Linux-v5.15/drivers/scsi/isci/
Dhost.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
100 * NORMALIZE_PUT_POINTER() -
110 * NORMALIZE_EVENT_POINTER() -
122 * NORMALIZE_GET_POINTER() -
131 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
137 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
140 * COMPLETION_QUEUE_CYCLE_BIT() -
152 sm->initial_state_id = initial_state; in sci_init_sm()
[all …]
/Linux-v5.15/drivers/i2c/busses/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 controller is part of the 7101 device, which is an ACPI-compliant
22 will be called i2c-ali1535.
30 controller is part of the 7101 device, which is an ACPI-compliant
34 will be called i2c-ali1563.
44 will be called i2c-ali15x3.
56 will be called i2c-amd756.
63 S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed
69 will be called i2c-amd756-s4882.
79 will be called i2c-amd8111.
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/Linux-v5.15/fs/nfsd/
Dnfs4proc.c2 * Server-side procedures for NFSv4.
71 struct inode *inode = d_inode(resfh->fh_dentry); in nfsd4_security_inode_setsecctx()
75 status = security_inode_setsecctx(resfh->fh_dentry, in nfsd4_security_inode_setsecctx()
76 label->data, label->len); in nfsd4_security_inode_setsecctx()
113 struct dentry *dentry = cstate->current_fh.fh_dentry; in check_attr_support()
114 struct svc_export *exp = cstate->current_fh.fh_export; in check_attr_support()
116 if (!nfsd_attrs_supported(cstate->minorversion, bmval)) in check_attr_support()
121 !(exp->ex_flags & NFSEXP_SECURITY_LABEL)) in check_attr_support()
137 if (open->op_create == NFS4_OPEN_CREATE) { in nfsd4_check_open_attributes()
138 if (open->op_createmode == NFS4_CREATE_UNCHECKED in nfsd4_check_open_attributes()
[all …]

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