| /Linux-v6.1/arch/arm64/boot/dts/arm/ |
| D | foundation-v8-spin-table.dtsi | 4 * ARMv8 Foundation model DTS (spin table configuration)
8 enable-method = "spin-table";
9 cpu-release-addr = <0x0 0x8000fff8>;
13 enable-method = "spin-table";
14 cpu-release-addr = <0x0 0x8000fff8>;
18 enable-method = "spin-table";
19 cpu-release-addr = <0x0 0x8000fff8>;
23 enable-method = "spin-table";
24 cpu-release-addr = <0x0 0x8000fff8>;
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| D | rtsm_ve-aemv8a.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
22 interrupt-parent = <&gic>;
23 #address-cells = <2>;
24 #size-cells = <2>;
36 #address-cells = <2>;
37 #size-cells = <0>;
[all …]
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| D | foundation-v8-gicv3.dts | 1 // SPDX-License-Identifier: GPL-2.0
8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv3.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
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| D | foundation-v8.dts | 1 // SPDX-License-Identifier: GPL-2.0
8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv2.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
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| /Linux-v6.1/Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
[all …]
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| /Linux-v6.1/drivers/gpu/drm/i915/gt/ |
| D | selftest_mocs.c | 1 // SPDX-License-Identifier: MIT
16 struct drm_i915_mocs_table table; member
32 ce->ring_size = SZ_16K; in mocs_context_create()
42 err = -ETIME; in request_add_sync()
48 static int request_add_spin(struct i915_request *rq, struct igt_spinner *spin) in request_add_spin() argument
54 if (spin && !igt_wait_for_spinner(spin, rq)) in request_add_spin()
55 err = -ETIME; in request_add_spin()
68 flags = get_mocs_settings(gt->i915, &arg->table); in live_mocs_init()
70 return -EINVAL; in live_mocs_init()
73 arg->l3cc = &arg->table; in live_mocs_init()
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| /Linux-v6.1/Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
39 2 - cpu-map node
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
46 - cpu-map node
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| /Linux-v6.1/arch/arm64/boot/dts/altera/ |
| D | socfpga_stratix10_swvp.dts | 1 // SPDX-License-Identifier: GPL-2.0
10 compatible = "altr,socfpga-stratix10-swvp", "altr,socfpga-stratix10";
27 stdout-path = "serial1:115200n8";
28 linux,initrd-start = <0x10000000>;
29 linux,initrd-end = <0x125c8324>;
39 enable-method = "spin-table";
40 cpu-release-addr = <0x0 0x0000fff8>;
44 enable-method = "spin-table";
45 cpu-release-addr = <0x0 0x0000fff8>;
49 enable-method = "spin-table";
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| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | s32v234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
4 * Copyright 2016-2018 NXP
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
23 #address-cells = <2>;
24 #size-cells = <0>;
28 compatible = "arm,cortex-a53";
[all …]
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | bcm2837.dtsi | 2 #include "bcm2835-common.dtsi"
3 #include "bcm2835-rpi-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/toshiba/ |
| D | tmpv7708.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * (C) Copyright 2018 - 2020, Toshiba Corporation.
10 #include <dt-bindings/clock/toshiba,tmpv770x.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/apple/ |
| D | t8103.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <0>;
[all …]
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| /Linux-v6.1/drivers/clk/stm32/ |
| D | clk-stm32-core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 #include <linux/clk-provider.h>
16 u32 *table; member
32 const struct clk_div_table *table; member
98 spinlock_t *lock; /* spin lock */
108 spinlock_t *lock; /* spin lock */
118 spinlock_t *lock; /* spin lock */
130 spinlock_t *lock; /* spin lock */
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| /Linux-v6.1/arch/powerpc/platforms/85xx/ |
| D | smp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2006-2008, 2011-2012, 2015 Freescale Semiconductor Inc.
26 #include <asm/code-patching.h>
58 qoriq_pm_ops->freeze_time_base(true); in mpc85xx_give_timebase()
61 * e5500/e6500 have a workaround for erratum A-006958 in place in mpc85xx_give_timebase()
62 * that will reread the timebase until TBL is non-zero. in mpc85xx_give_timebase()
66 * TBL is non-zero, we ensure that TB does not change. We don't in mpc85xx_give_timebase()
91 qoriq_pm_ops->freeze_time_base(false); in mpc85xx_give_timebase()
122 qoriq_pm_ops->irq_mask(cpu); in smp_85xx_cpu_offline_self()
131 cur_cpu_spec->cpu_down_flush(); in smp_85xx_cpu_offline_self()
[all …]
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| /Linux-v6.1/Documentation/hwmon/ |
| D | lm93.rst | 10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
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| /Linux-v6.1/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
[all …]
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| /Linux-v6.1/arch/arm64/kernel/ |
| D | smp_spin_table.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Spin Table SMP initialisation
50 return -ENODEV; in smp_spin_table_cpu_init()
55 ret = of_property_read_u64(dn, "cpu-release-addr", in smp_spin_table_cpu_init()
58 pr_err("CPU %d: missing or invalid cpu-release-addr property\n", in smp_spin_table_cpu_init()
72 return -ENODEV; in smp_spin_table_cpu_prepare()
75 * The cpu-release-addr may or may not be inside the linear mapping. in smp_spin_table_cpu_prepare()
83 return -ENOMEM; in smp_spin_table_cpu_prepare()
87 * endianness of the kernel. Therefore, any boot-loaders that in smp_spin_table_cpu_prepare()
89 * boot-loader's endianness before jumping. This is mandated by in smp_spin_table_cpu_prepare()
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/apm/ |
| D | apm-shadowcat.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
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| D | apm-storm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
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| /Linux-v6.1/kernel/locking/ |
| D | qspinlock_paravirt.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 * pv_wait(u8 *ptr, u8 val) -- suspends the vcpu if *ptr == val
17 * pv_kick(cpu) -- wakes a suspended vcpu
31 * mitigates the slight slowdown for non-overcommitted guest with this
32 * aggressive wait-early mechanism.
64 * pv_wait_head_or_lock() to signal that it is ready to spin on the lock.
88 int val = atomic_read(&lock->val); in pv_hybrid_queued_unfair_trylock()
91 (cmpxchg_acquire(&lock->locked, 0, _Q_LOCKED_VAL) == 0)) { in pv_hybrid_queued_unfair_trylock()
111 WRITE_ONCE(lock->pending, 1); in set_pending()
121 return !READ_ONCE(lock->locked) && in trylock_clear_pending()
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/broadcom/bcmbca/ |
| D | bcm4908.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
8 /dts-v1/;
11 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 stdout-path = "serial0:115200n8";
[all …]
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| /Linux-v6.1/arch/powerpc/platforms/44x/ |
| D | iss4xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright 2002-2005 MontaVista Software Inc.
12 * Copyright (c) 2003-2005 Zultys Technologies
54 for_each_node_with_property(np, "interrupt-controller") { in iss4xx_init_irq()
66 } else if (of_device_is_compatible(np, "chrp,open-pic")) { in iss4xx_init_irq()
68 * device-tree, just pass 0 to all arguments in iss4xx_init_irq()
94 /* Assume spin table. We could test for the enable-method in in smp_iss4xx_kick_cpu()
95 * the device-tree but currently there's little point as it's in smp_iss4xx_kick_cpu()
98 spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr", in smp_iss4xx_kick_cpu()
101 pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu); in smp_iss4xx_kick_cpu()
[all …]
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| D | ppc476.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright 2002-2005 MontaVista Software Inc.
13 * Copyright (c) 2003-2005 Zultys Technologies
98 { "akebono-avr", 0 },
104 .name = "akebono-avr",
124 for_each_node_with_property(np, "interrupt-controller") { in ppc47x_init_irq()
132 if (of_device_is_compatible(np, "chrp,open-pic")) { in ppc47x_init_irq()
134 * device-tree, just pass 0 to all arguments in ppc47x_init_irq()
162 /* Assume spin table. We could test for the enable-method in in smp_ppc47x_kick_cpu()
163 * the device-tree but currently there's little point as it's in smp_ppc47x_kick_cpu()
[all …]
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| /Linux-v6.1/include/linux/ |
| D | rhashtable-types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Resizable, Scalable, Concurrent Hash Table
29 * struct rhashtable_compare_arg - Key for the function rhashtable_compare
30 * @ht: Hash table
44 * struct rhashtable_params - Hash table construction parameters
70 * struct rhashtable - Hash table handle
71 * @tbl: Bucket table
73 * @max_elems: Maximum number of elements in table
77 * @mutex: Mutex to protect current/future table swapping
78 * @lock: Spin lock to protect walker list
[all …]
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| /Linux-v6.1/Documentation/kernel-hacking/ |
| D | locking.rst | 35 .. table:: Expected Results
37 +------------------------------------+------------------------------------+
41 +------------------------------------+------------------------------------+
43 +------------------------------------+------------------------------------+
45 +------------------------------------+------------------------------------+
47 +------------------------------------+------------------------------------+
49 +------------------------------------+------------------------------------+
51 +------------------------------------+------------------------------------+
55 .. table:: Possible Results
57 +------------------------------------+------------------------------------+
[all …]
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