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Searched +full:sparx5 +full:- +full:sgpio (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dmicrochip,sparx5-sgpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars Povlsen <lars.povlsen@microchip.com>
21 pattern: "^gpio@[0-9a-f]+$"
25 - microchip,sparx5-sgpio
26 - mscc,ocelot-sgpio
27 - mscc,luton-sgpio
29 "#address-cells":
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/Linux-v5.15/arch/arm64/boot/dts/microchip/
Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
11 compatible = "microchip,sparx5";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <2>;
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Dsparx5_pcb125.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Sparx5 PCB125 Reference Board";
11 compatible = "microchip,sparx5-pcb125", "microchip,sparx5";
20 emmc_pins: emmc-pins {
28 drive-strength = <3>;
35 bus-width = <8>;
36 non-removable;
37 pinctrl-0 = <&emmc_pins>;
38 max-frequency = <8000000>;
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/Linux-v5.15/Documentation/devicetree/bindings/net/
Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 Ethernet switch controller
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
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/Linux-v5.15/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
7 * https://github.com/microchip-ung/sparx-5_reginfo
32 ((SPX5_BUFFER_MEMORY / SPX5_BUFFER_CELL_SZ - 100) * (fraction) / 100)
212 static int sparx5_create_targets(struct sparx5 *sparx5) in sparx5_create_targets() argument
223 if (idx == iomap->range) { in sparx5_create_targets()
229 iores[idx] = platform_get_resource(sparx5->pdev, IORESOURCE_MEM, in sparx5_create_targets()
232 dev_err(sparx5->dev, "Invalid resource\n"); in sparx5_create_targets()
233 return -EINVAL; in sparx5_create_targets()
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/Linux-v5.15/drivers/pinctrl/
Dpinctrl-microchip-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
127 addr->port = pin / priv->bitcount; in sgpio_pin_to_addr()
128 addr->bit = pin % priv->bitcount; in sgpio_pin_to_addr()
133 return bit + port * priv->bitcount; in sgpio_addr_to_pin()
138 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_readl()
146 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_writel()
154 u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; in sgpio_clrsetbits()
165 int width = priv->bitcount - 1; in sgpio_configure_bitstream()
168 switch (priv->properties->arch) { in sgpio_configure_bitstream()
194 switch (priv->properties->arch) { in sgpio_configure_clock()
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/Linux-v5.15/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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