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/Linux-v6.1/drivers/pinctrl/qcom/
Dpinctrl-sc7280-lpass-lpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
4 * ALSA SoC platform-machine driver for QTi LPASS
11 #include "pinctrl-lpass-lpi.h"
68 PINCTRL_PIN(12, "gpio12"),
83 static const char * const dmic3_clk_groups[] = { "gpio12" };
93 static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" };
148 .compatible = "qcom,sc7280-lpass-lpi-pinctrl",
157 .name = "qcom-sc7280-lpass-lpi-pinctrl",
/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dbrcm,bcm6318-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6318 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
Dbrcm,bcm6362-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6362 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
Dbrcm,bcm6368-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6368 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dqcom-ipq4019-ap.dk07.1-c1.dts1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include "qcom-ipq4019-ap.dk07.1.dtsi"
8 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
9 compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";
11 soc {
14 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
22 serial_1_pins: serial1-pinmux {
26 bias-disable;
29 spi_0_pins: spi-0-pinmux {
[all …]
Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
25 soc {
27 serial_0_pins: serial0-pinmux {
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
Dbcm2837-rpi-zero-2-w.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "bcm2836-rpi.dtsi"
9 #include "bcm283x-rpi-usb-otg.dtsi"
10 #include "bcm283x-rpi-wifi-bt.dtsi"
13 compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837";
23 stdout-path = "serial1:115200n8";
27 led-act {
34 shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
42 * "NC" = not connected (no rail from the SoC)
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dox820.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/oxsemi,ox820.h>
10 #include <dt-bindings/reset/oxsemi,ox820.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
20 enable-method = "oxsemi,ox820-smp";
[all …]
Dste-href-ab8500.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-ab8500.dtsi"
9 soc {
14 pinctrl-names = "default";
15 pinctrl-0 = <&gpio2_default_mode>,
51 input-enable;
52 bias-pull-down;
64 input-enable;
65 bias-pull-down;
77 input-enable;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Drt5659.txt7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
23 - realtek,dmic1-data-pin
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dbitmain,bm1880-pinctrl.txt3 This binding describes the pin controller found in the BM1880 SoC.
7 - compatible: Should be "bitmain,bm1880-pinctrl"
8 - reg: Offset and length of pinctrl space in SCTRL.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
16 pin, a group, or a list of pins or groups. This configuration for BM1880 SoC
17 includes pinmux and various pin configuration parameters, such as pull-up,
24 The following generic properties as defined in pinctrl-bindings.txt are valid
29 - pins: An array of strings, each string containing the name of a pin.
32 MIO0 - MIO111
34 - groups: An array of strings, each string containing the name of a pin
[all …]
Dbrcm,bcm11351-pinctrl.txt3 This is a pin controller for the Broadcom BCM281xx SoC family, which includes
10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
/Linux-v6.1/drivers/pinctrl/
Dpinctrl-lantiq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/drivers/pinctrl/pinctrl-lantiq.h
4 * based on linux/drivers/pinctrl/pinctrl-pxa3xx.h
101 /* soc specific callback used to apply muxing */
118 GPIO12, enumerator
Dpinctrl-oxnas.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Oxford Semiconductor OXNAS SoC Family pinctrl driver
7 * Based on pinctrl-pic32.c
18 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-utils.h"
117 PINCTRL_PIN(12, "gpio12"),
155 PINCTRL_PIN(12, "gpio12"),
199 "gpio12", "gpio13", "gpio14", "gpio15",
222 "gpio12", "gpio13", "gpio14", "gpio15",
236 "gpio12", "gpio13", "gpio14", "gpio15",
[all …]
/Linux-v6.1/arch/arm/mach-pxa/
Dmfp-pxa2xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/soc/pxa/mfp.h>
8 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx:
19 * bit 23 - Input/Output (PXA2xx specific)
20 * bit 24 - Wakeup Enable(PXA2xx specific)
21 * bit 25 - Keep Output (PXA2xx specific)
66 #define GPIO12_GPIO MFP_CFG_IN(GPIO12, AF0)
Dmfp-pxa3xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/soc/pxa/mfp.h>
9 /* PXA3xx common MFP configurations - processor specific ones defined
10 * in mfp-pxa300.h and mfp-pxa320.h
24 #define GPIO12_GPIO MFP_CFG(GPIO12, AF0)
Dpxa930.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa930.c
7 * Copyright (C) 2007-2008 Marvell Internation Ltd.
12 #include <linux/dma-mapping.h>
14 #include <linux/gpio-pxa.h>
16 #include <linux/soc/pxa/cpu.h>
36 MFP_ADDR(GPIO12, 0x0304),
/Linux-v6.1/drivers/pinctrl/berlin/
Dberlin-bg2.c1 // SPDX-License-Identifier: GPL-2.0
7 * Antoine Ténart <antoine.tenart@free-electrons.com>
32 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
75 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
80 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
127 BERLIN_PINCTRL_FUNCTION(0x7, "pdm_b")), /* gpio12..14,pdm */
218 .compatible = "marvell,berlin2-soc-pinctrl",
222 .compatible = "marvell,berlin2-system-pinctrl",
231 of_match_device(berlin2_pinctrl_match, &pdev->dev); in berlin2_pinctrl_probe()
233 return berlin_pinctrl_probe(pdev, match->data); in berlin2_pinctrl_probe()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/bitmain/
Dbm1880-sophon-edge.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
19 * Line names are taken from the schematic "sophon-edge-schematics"
29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
34 compatible = "bitmain,sophon-edge", "bitmain,bm1880";
44 stdout-path = "serial0:115200n8";
52 soc {
54 porta: gpio-controller@0 {
55 gpio-line-names =
56 "GPIO-A", /* GPIO0, LSEC pin 23 */
[all …]
/Linux-v6.1/arch/arm64/boot/dts/hisilicon/
Dhi3670-hikey970.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
14 #include "hikey970-pinctrl.dtsi"
15 #include "hikey970-pmic.dtsi"
19 compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
34 stdout-path = "serial6:115200n8";
43 wlan_en: wlan-en-1-8v {
44 compatible = "regulator-fixed";
45 regulator-name = "wlan-en-regulator";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/lg/
Dlg1312.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for lg1312 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
[all …]
Dlg1313.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for lg1313 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/
Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
18 …compatible = "cznic,turris1x", "fsl,P2020RDB-PC"; /* fsl,P2020RDB-PC is required for booting Linux…
36 soc: soc@ffe00000 { label
41 gpio-controller@18 {
[all …]

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