Lines Matching +full:soc +full:- +full:gpio12
1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for lg1313 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
26 next-level-cache = <&L2_0>;
30 compatible = "arm,cortex-a53";
32 enable-method = "psci";
33 next-level-cache = <&L2_0>;
37 compatible = "arm,cortex-a53";
39 enable-method = "psci";
40 next-level-cache = <&L2_0>;
44 compatible = "arm,cortex-a53";
46 enable-method = "psci";
47 next-level-cache = <&L2_0>;
49 L2_0: l2-cache0 {
55 compatible = "arm,psci-0.2", "arm,psci";
62 gic: interrupt-controller@c0001000 {
63 #interrupt-cells = <3>;
64 compatible = "arm,gic-400";
65 interrupt-controller;
73 compatible = "arm,cortex-a53-pmu";
78 interrupt-affinity = <&cpu0>,
85 compatible = "arm,armv8-timer";
97 #clock-cells = <0>;
99 compatible = "fixed-clock";
100 clock-frequency = <198000000>;
101 clock-output-names = "BUSCLK";
104 soc {
105 #address-cells = <2>;
106 #size-cells = <1>;
108 compatible = "simple-bus";
109 interrupt-parent = <&gic>;
117 clock-names = "hclk", "pclk";
118 phy-mode = "rmii";
120 mac-address = [ 00 00 00 00 00 00 ];
125 #address-cells = <2>;
126 #size-cells = <1>;
127 #interrupt-cells = <3>;
129 compatible = "simple-bus";
130 interrupt-parent = <&gic>;
138 clock-names = "timer0clk", "timer1clk", "apb_pclk";
145 clock-names = "wdog_clk", "apb_pclk";
152 clock-names = "apb_pclk";
160 clock-names = "apb_pclk";
168 clock-names = "apb_pclk";
176 clock-names = "apb_pclk";
183 clock-names = "apb_pclk";
185 dmac0: dma-controller@c1128000 {
190 clock-names = "apb_pclk";
191 #dma-cells = <1>;
194 #gpio-cells = <2>;
196 gpio-controller;
199 clock-names = "apb_pclk";
203 #gpio-cells = <2>;
205 gpio-controller;
208 clock-names = "apb_pclk";
212 #gpio-cells = <2>;
214 gpio-controller;
217 clock-names = "apb_pclk";
221 #gpio-cells = <2>;
223 gpio-controller;
226 clock-names = "apb_pclk";
229 #gpio-cells = <2>;
231 gpio-controller;
234 clock-names = "apb_pclk";
238 #gpio-cells = <2>;
240 gpio-controller;
243 clock-names = "apb_pclk";
247 #gpio-cells = <2>;
249 gpio-controller;
252 clock-names = "apb_pclk";
256 #gpio-cells = <2>;
258 gpio-controller;
261 clock-names = "apb_pclk";
265 #gpio-cells = <2>;
267 gpio-controller;
270 clock-names = "apb_pclk";
274 #gpio-cells = <2>;
276 gpio-controller;
279 clock-names = "apb_pclk";
283 #gpio-cells = <2>;
285 gpio-controller;
288 clock-names = "apb_pclk";
292 #gpio-cells = <2>;
294 gpio-controller;
297 clock-names = "apb_pclk";
299 gpio12: gpio@fd4c0000 { label
300 #gpio-cells = <2>;
302 gpio-controller;
305 clock-names = "apb_pclk";
309 #gpio-cells = <2>;
311 gpio-controller;
314 clock-names = "apb_pclk";
318 #gpio-cells = <2>;
320 gpio-controller;
323 clock-names = "apb_pclk";
327 #gpio-cells = <2>;
329 gpio-controller;
332 clock-names = "apb_pclk";
336 #gpio-cells = <2>;
338 gpio-controller;
341 clock-names = "apb_pclk";
345 #gpio-cells = <2>;
347 gpio-controller;
350 clock-names = "apb_pclk";