Searched +full:sdx55 +full:- +full:pcie +full:- +full:ep (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Qualcomm PCIe Endpoint Controller binding10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>15 - qcom,sdx55-pcie-ep16 - qcom,sm8450-pcie-ep20 - description: Qualcomm-specific PARF configuration registers21 - description: DesignWare PCIe registers[all …]
1 // SPDX-License-Identifier: BSD-3-Clause3 * SDX55 SoC device tree source9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>10 #include <dt-bindings/clock/qcom,rpmh.h>11 #include <dt-bindings/gpio/gpio.h>12 #include <dt-bindings/interconnect/qcom,sdx55.h>13 #include <dt-bindings/interrupt-controller/arm-gic.h>14 #include <dt-bindings/power/qcom-rpmpd.h>15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>18 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Qualcomm PCIe Endpoint controller driver24 #include "pcie-designware.h"135 #define to_pcie_ep(x) dev_get_drvdata((x)->dev)145 * struct qcom_pcie_ep - Qualcomm PCIe Endpoint Controller146 * @pci: Designware PCIe controller struct147 * @parf: Qualcomm PCIe specific PARF register base148 * @elbi: Designware PCIe specific ELBI register base152 * @core_reset: PCIe Endpoint core reset156 * @debugfs: PCIe Endpoint Debugfs directory[all …]
