| /Linux-v6.1/drivers/dma/ |
| D | imx-sdma.c | 3 // drivers/dma/imx-sdma.c
47 /* SDMA registers */
105 * Error bit set in the CCB status field by the SDMA,
146 * 28 Lower WML Event(LWE) SDMA events reg to check for
150 * 29 Higher WML Event(HWE) SDMA events reg to check for
194 * struct sdma_script_start_addrs - SDMA script start pointers
197 * address space of the SDMA engine.
276 * @unused: padding. The SDMA engine expects an array of 128 byte
286 * struct sdma_state_registers - SDMA context for a channel
315 * struct sdma_context_data - sdma context specific to a channel
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/dma/ |
| D | fsl-imx-sdma.txt | 1 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx6ul-sdma"
13 "fsl,imx8mq-sdma"
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| /Linux-v6.1/drivers/net/ethernet/marvell/prestera/ |
| D | prestera_rxtx.c | 105 /* protect SDMA with concurrent access from multiple CPUs */
110 struct prestera_sdma sdma; member
113 static int prestera_sdma_buf_init(struct prestera_sdma *sdma, in prestera_sdma_buf_init() argument
119 desc = dma_pool_alloc(sdma->desc_pool, GFP_DMA | GFP_KERNEL, &dma); in prestera_sdma_buf_init()
131 static u32 prestera_sdma_map(struct prestera_sdma *sdma, dma_addr_t pa) in prestera_sdma_map() argument
133 return sdma->map_addr + pa; in prestera_sdma_map()
136 static void prestera_sdma_rx_desc_init(struct prestera_sdma *sdma, in prestera_sdma_rx_desc_init() argument
145 desc->buff = cpu_to_le32(prestera_sdma_map(sdma, buf)); in prestera_sdma_rx_desc_init()
153 static void prestera_sdma_rx_desc_set_next(struct prestera_sdma *sdma, in prestera_sdma_rx_desc_set_next() argument
157 desc->next = cpu_to_le32(prestera_sdma_map(sdma, next)); in prestera_sdma_rx_desc_set_next()
[all …]
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| /Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_sdma.c | 30 /* SDMA CSA reside in the 3rd page of CSA */
34 * GPU SDMA IP block helpers function.
42 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring()
43 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_instance_from_ring()
44 ring == &adev->sdma.instance[i].page) in amdgpu_sdma_get_instance_from_ring()
45 return &adev->sdma.instance[i]; in amdgpu_sdma_get_instance_from_ring()
55 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring()
56 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_index_from_ring()
57 ring == &adev->sdma.instance[i].page) { in amdgpu_sdma_get_index_from_ring()
74 /* don't enable OS preemption on SDMA under SRIOV */ in amdgpu_sdma_get_csa_mc_addr()
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| D | sdma_v4_0.c | 555 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv()
619 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
627 for every SDMA instance */ in sdma_v4_0_init_microcode()
780 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_insert_nop() local
784 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_insert_nop()
913 * @enable: enable SDMA RB/IB
923 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
959 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
1008 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
1020 * Enable SDMA utilization. Its only supported on in sdma_v4_0_ctx_switch_enable()
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| D | cik_sdma.c | 76 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode()
77 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_free_microcode()
78 adev->sdma.instance[i].fw = NULL; in cik_sdma_free_microcode()
83 * sDMA - System DMA
91 * (ring buffer, IBs, etc.), but sDMA has it's own
93 * used by the CP. sDMA supports copying data, writing
135 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
140 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in cik_sdma_init_microcode()
143 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
148 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
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| D | sdma_v2_4.c | 81 * sDMA - System DMA
89 * (ring buffer, IBs, etc.), but sDMA has it's own
91 * used by the CP. sDMA supports copying data, writing
116 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode()
117 release_firmware(adev->sdma.instance[i].fw); in sdma_v2_4_free_microcode()
118 adev->sdma.instance[i].fw = NULL; in sdma_v2_4_free_microcode()
149 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()
154 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v2_4_init_microcode()
157 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v2_4_init_microcode()
160 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v2_4_init_microcode()
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| D | sdma_v3_0.c | 182 * sDMA - System DMA
190 * (ring buffer, IBs, etc.), but sDMA has it's own
192 * used by the CP. sDMA supports copying data, writing
253 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode()
254 release_firmware(adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode()
255 adev->sdma.instance[i].fw = NULL; in sdma_v3_0_free_microcode()
307 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
312 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v3_0_init_microcode()
315 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode()
318 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode()
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| D | sdma_v6_0.c | 248 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v6_0_ring_insert_nop() local
252 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v6_0_ring_insert_nop()
406 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_stop()
458 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_enable()
484 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_resume()
485 ring = &adev->sdma.instance[i].ring; in sdma_v6_0_gfx_resume()
557 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v6_0_gfx_resume()
634 * sdma_v6_0_load_microcode - load the sDMA ME ucode
652 if (!adev->sdma.instance[0].fw) in sdma_v6_0_load_microcode()
655 /* use broadcast mode to load SDMA microcode by default */ in sdma_v6_0_load_microcode()
[all …]
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| D | si_dma.c | 49 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_get_wptr()
57 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_set_wptr()
121 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()
122 ring = &adev->sdma.instance[i].ring; in si_dma_stop()
137 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()
138 ring = &adev->sdma.instance[i].ring; in si_dma_start()
357 * si_dma_vm_set_pte_pde - update the page tables using sDMA
366 * Update the page tables using sDMA (CIK).
438 * si_dma_ring_emit_vm_flush - cik vm flush using sDMA
445 * using sDMA (VI).
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| D | sdma_v5_2.c | 261 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_insert_nop() local
265 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_2_ring_insert_nop()
422 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_stop()
481 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_ctx_switch_enable()
520 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_enable()
548 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_resume()
549 ring = &adev->sdma.instance[i].ring; in sdma_v5_2_gfx_resume()
707 * sdma_v5_2_load_microcode - load the sDMA ME ucode
724 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_load_microcode()
725 if (!adev->sdma.instance[i].fw) in sdma_v5_2_load_microcode()
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| D | sdma_v5_0.c | 267 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
429 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_0_ring_insert_nop() local
433 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_0_ring_insert_nop()
592 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_gfx_stop()
651 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_ctx_switch_enable()
693 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_enable()
720 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_gfx_resume()
721 ring = &adev->sdma.instance[i].ring; in sdma_v5_0_gfx_resume()
880 * sdma_v5_0_load_microcode - load the sDMA ME ucode
897 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_load_microcode()
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| D | sdma_v4_4.c | 24 #include "sdma/sdma_4_4_0_offset.h"
25 #include "sdma/sdma_4_4_0_sh_mask.h"
35 * to calculate register offset for all the sdma instances */
176 /* the SDMA_EDC_COUNTER register in each sdma instance in sdma_v4_4_get_ras_error_count()
183 dev_info(adev->dev, "Detected %s in SDMA%d, SED %d\n", in sdma_v4_4_get_ras_error_count()
218 * SDMA RAS supports single bit uncorrectable error detection. in sdma_v4_4_query_ras_error_count_by_instance()
224 * SDMA RAS does not support correctable errors. in sdma_v4_4_query_ras_error_count_by_instance()
237 /* write 0 to EDC_COUNTER reg to clear sdma edc counters */ in sdma_v4_4_reset_ras_error_count()
239 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_reset_ras_error_count()
252 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_query_ras_error_count()
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | omap2.dtsi | 62 dmas = <&sdma 9 &sdma 10>;
100 sdma: dma-controller@0 { label
101 compatible = "ti,omap2420-sdma", "ti,omap-sdma";
136 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
137 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
147 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
163 dmas = <&sdma 13>;
172 dmas = <&sdma 49 &sdma 50>;
182 dmas = <&sdma 51 &sdma 52>;
192 dmas = <&sdma 53 &sdma 54>;
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| D | omap2430.dtsi | 186 dmas = <&sdma 31>,
187 <&sdma 32>;
202 dmas = <&sdma 33>,
203 <&sdma 34>;
218 dmas = <&sdma 17>,
219 <&sdma 18>;
234 dmas = <&sdma 19>,
235 <&sdma 20>;
250 dmas = <&sdma 21>,
251 <&sdma 22>;
[all …]
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| D | omap3.dtsi | 181 dmas = <&sdma 9 &sdma 10>;
207 dmas = <&sdma 65 &sdma 66>;
289 sdma: dma-controller@0 { label
290 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
373 dmas = <&sdma 49 &sdma 50>;
383 dmas = <&sdma 51 &sdma 52>;
393 dmas = <&sdma 53 &sdma 54>;
448 dmas = <&sdma 35>,
449 <&sdma 36>,
450 <&sdma 37>,
[all …]
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| D | imx6sll.dtsi | 160 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>;
184 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
196 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
208 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
220 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
233 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
246 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
259 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
271 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
284 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
[all …]
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| D | imx6qdl.dtsi | 311 dmas = <&sdma 14 18 0>,
312 <&sdma 15 18 0>;
336 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
350 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
364 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
378 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
390 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
406 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
420 dmas = <&sdma 37 1 0>,
421 <&sdma 38 1 0>;
[all …]
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| D | imx31.dtsi | 135 dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
182 dmas = <&sdma 20 3 0>;
193 dmas = <&sdma 21 3 0>;
213 dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
248 dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
300 sdma: dma-controller@53fd4000 { label
301 compatible = "fsl,imx31-sdma";
307 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
348 dmas = <&sdma 30 17 0>;
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| D | imx6sx.dtsi | 263 dmas = <&sdma 14 18 0>,
264 <&sdma 15 18 0>;
337 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
353 dmas = <&sdma 23 21 0>,
354 <&sdma 24 21 0>;
367 dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
381 dmas = <&sdma 41 1 0>, <&sdma 42 1 0>;
395 dmas = <&sdma 45 1 0>, <&sdma 46 1 0>;
417 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>,
418 <&sdma 19 23 1>, <&sdma 20 23 1>,
[all …]
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| /Linux-v6.1/drivers/infiniband/hw/hfi1/ |
| D | vnic_sdma.c | 7 * This file contains HFI1 support for VNIC SDMA functionality
10 #include "sdma.h"
21 * @txreq: sdma transmit request
22 * @sdma: vnic sdma pointer
30 struct hfi1_vnic_sdma *sdma; member
42 struct hfi1_vnic_sdma *vnic_sdma = tx->sdma; in vnic_sdma_complete()
129 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; in hfi1_vnic_send_dma()
146 tx->sdma = vnic_sdma; in hfi1_vnic_send_dma()
156 /* When -ECOMM, sdma callback will be called with ABORT status */ in hfi1_vnic_send_dma()
178 * hfi1_vnic_sdma_sleep - vnic sdma sleep function
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| D | vnic.h | 10 #include "sdma.h"
33 * struct hfi1_vnic_sdma - VNIC per Tx ring SDMA information
35 * @sde - sdma engine
38 * @stx - sdma tx request
39 * @state - vnic Tx ring SDMA state
79 * @sdma: VNIC SDMA structure per TXQ
95 struct hfi1_vnic_sdma sdma[HFI1_VNIC_MAX_TXQ]; member
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| D | Kconfig | 11 bool "HFI1 SDMA Order debug"
16 sdma completions for unit testing
18 bool "Config SDMA Verbosity"
23 SDMA debug
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| /Linux-v6.1/arch/powerpc/include/asm/ |
| D | mpc52xx.h | 76 /* SDMA */
78 u32 taskBar; /* SDMA + 0x00 */
79 u32 currentPointer; /* SDMA + 0x04 */
80 u32 endPointer; /* SDMA + 0x08 */
81 u32 variablePointer; /* SDMA + 0x0c */
83 u8 IntVect1; /* SDMA + 0x10 */
84 u8 IntVect2; /* SDMA + 0x11 */
85 u16 PtdCntrl; /* SDMA + 0x12 */
87 u32 IntPend; /* SDMA + 0x14 */
88 u32 IntMask; /* SDMA + 0x18 */
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/sound/ |
| D | fsl,asrc.txt | 74 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
75 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
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