Home
last modified time | relevance | path

Searched +full:scu +full:- +full:index (Results 1 – 25 of 42) sorted by relevance

12

/Linux-v5.15/drivers/platform/x86/intel/telemetry/
Dpltdrv.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <asm/intel-family.h>
191 *unit_config = &(telm_conf->pss_config); in telem_get_unitconfig()
193 *unit_config = &(telm_conf->ioss_config); in telem_get_unitconfig()
195 return -EINVAL; in telem_get_unitconfig()
215 return -EINVAL; in telemetry_check_evtid()
221 return -EINVAL; in telemetry_check_evtid()
224 return -EINVAL; in telemetry_check_evtid()
229 if ((len + unit_config->ssram_evts_used) > in telemetry_check_evtid()
231 return -EINVAL; in telemetry_check_evtid()
[all …]
/Linux-v5.15/drivers/scsi/isci/
Dscu_remote_node_context.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * This file contains the structures and constatns used by the SCU hardware to
67 * struct ssp_remote_node_context - This structure contains the SCU hardware
76 * This field is the remote node index assigned for this remote node. All
77 * remote nodes must have a unique remote node index. The value of the remote
78 * node index can not exceed the maximum number of remote nodes reported in
79 * the SCU device context capacity register.
85 * This field tells the SCU hardware how many simultaneous connections that
[all …]
Dscu_task_context.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * This file contains the structures and constants for the SCU hardware task
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
69 * types the SCU hardware will accept. The definition for the various task
70 * types the SCU hardware will accept can be found in the DS specification.
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
85 * types the SCU hardware will accept. The definition for the various task
86 * types the SCU hardware will accept can be found in the DS specification.
[all …]
Dscu_completion_codes.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * This file contains the constants and macros for the SCU hardware completion
70 * SCU_COMPLETION_TYPE() -
72 * This macro constructs an SCU completion type
78 * SCU_COMPLETION_TYPE() -
80 * These macros contain the SCU completion types SCU_COMPLETION_TYPE
92 * an SCU completion code.
105 * SCU_GET_COMPLETION_TYPE() -
[all …]
Dremote_node_table.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
64 * Remote node sets are sets of remote node index in the remote node table. The
65 * SCU hardware requires that STP remote node entries take three consecutive
66 * remote node index so the table is arranged in sets of three. The bits are
133 * struct sci_remote_node_table -
150 * Because of the way STP remote node data is allocated on the SCU hardware
152 * entries. For ease of allocation and de-allocation we have broken the
173 /* --------------------------------------------------------------------------- */
Disci.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
118 * enum sci_status - This is the general return status enumeration for non-IO,
119 * non-task management related SCI interface methods.
139 * This Value indicates that the SCU hardware returned an early response
344 * of messages (MSI-X) is not supported.
386 * INDEX DOES NOT EXIST, usually means exceeding max route index.
400 * enum sci_io_status - This enumeration depicts all of the possible IO
405 * Add the API to retrieve the SCU status from the core. Check to see that the
[all …]
Drequest.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
78 return &ireq->tc->sgl_pair_ab; in to_sgl_element_pair()
80 return &ireq->tc->sgl_pair_cd; in to_sgl_element_pair()
84 return &ireq->sg_table[idx - 2]; in to_sgl_element_pair()
93 offset = (void *) &ireq->tc->sgl_pair_ab - in to_sgl_element_pair_dma()
94 (void *) &ihost->task_context_table[0]; in to_sgl_element_pair_dma()
95 return ihost->tc_dma + offset; in to_sgl_element_pair_dma()
97 offset = (void *) &ireq->tc->sgl_pair_cd - in to_sgl_element_pair_dma()
[all …]
Dunsolicited_frame_control.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
62 struct sci_unsolicited_frame_control *uf_control = &ihost->uf_control; in sci_unsolicited_frame_control_construct()
64 dma_addr_t dma = ihost->ufi_dma; in sci_unsolicited_frame_control_construct()
65 void *virt = ihost->ufi_buf; in sci_unsolicited_frame_control_construct()
75 * Program the location of the UF header table into the SCU. in sci_unsolicited_frame_control_construct()
77 * - The address must align on a 64-byte boundary. Guaranteed to be in sci_unsolicited_frame_control_construct()
78 * on 64-byte boundary already 1KB boundary for unsolicited frames. in sci_unsolicited_frame_control_construct()
79 * - Program unused header entries to overlap with the last in sci_unsolicited_frame_control_construct()
[all …]
Dregisters.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * This file contains the constants and structures for the SCU memory mapped
109 * struct scu_viit_entry - This is the SCU Virtual Initiator Table Entry
164 * struct scu_iit_entry - This will be implemented later when we support
177 /* Generate a value for an SCU register */
182 * Generate a bit value for an SCU register
195 * Unions for bitfield definitions of SCU Registers
394 /* -------------------------------------------------------------------------- */
[all …]
Dport_config.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
93 return -1; in sci_sas_address_compare()
97 return -1; in sci_sas_address_compare()
133 for (i = 0; i < ihost->logical_port_entries; i++) { in sci_port_configuration_agent_find_port()
134 struct isci_port *iport = &ihost->ports[i]; in sci_port_configuration_agent_find_port()
152 * This routine will validate the port configuration is correct for the SCU
153 * hardware. The SCU hardware allows for port configurations as follows. LP0
154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,
[all …]
/Linux-v5.15/drivers/clk/imx/
Dclk-scu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2021 NXP
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <linux/arm-smccc.h>
10 #include <linux/clk-provider.h>
18 #include "clk-scu.h"
42 * struct clk_scu - Description of one SCU clock
44 * @rsrc_id: resource ID of this SCU clock
60 * struct clk_gpr_scu - Description of one SCU GPR clock
62 * @rsrc_id: resource ID of this SCU clock
[all …]
Dclk-lpcg-scu.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/clk-provider.h>
14 #include "clk-scu.h"
23 * struct clk_lpcg_scu - Description of LPCG clock
27 * @bit_idx: bit index of this LPCG clock
52 reg = readl_relaxed(clk->reg); in clk_lpcg_scu_enable()
53 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); in clk_lpcg_scu_enable()
56 if (clk->hw_gate) in clk_lpcg_scu_enable()
59 reg |= val << clk->bit_idx; in clk_lpcg_scu_enable()
60 writel(reg, clk->reg); in clk_lpcg_scu_enable()
[all …]
/Linux-v5.15/drivers/nvmem/
Dimx-ocotp-scu.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/arm-smccc.h>
13 #include <linux/nvmem-provider.h>
75 static bool in_hole(void *context, u32 index) in in_hole() argument
78 const struct ocotp_devtype_data *data = priv->data; in in_hole()
81 for (i = 0; i < data->num_region; i++) { in in_hole()
82 if (data->region[i].flag & HOLE_REGION) { in in_hole()
83 if ((index >= data->region[i].start) && in in_hole()
84 (index <= data->region[i].end)) in in_hole()
92 static bool in_ecc(void *context, u32 index) in in_ecc() argument
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/can/
Dfsl,flexcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx8qm-flexcan
21 - fsl,imx8mp-flexcan
22 - fsl,imx6q-flexcan
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/arm/freescale/
Dfsl,scu.txt2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
19 The scu node with the following properties shall be under the /firmware/ node.
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
60 i.MX SCU Client Device Node:
[all …]
/Linux-v5.15/drivers/gpu/drm/ast/
Dast_main.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
41 uint32_t base, uint8_t index, in ast_set_index_reg_mask() argument
45 ast_io_write8(ast, base, index); in ast_set_index_reg_mask()
47 ast_set_index_reg(ast, base, index, tmp); in ast_set_index_reg_mask()
51 uint32_t base, uint8_t index) in ast_get_index_reg() argument
54 ast_io_write8(ast, base, index); in ast_get_index_reg()
60 uint32_t base, uint8_t index, uint8_t mask) in ast_get_index_reg_mask() argument
63 ast_io_write8(ast, base, index); in ast_get_index_reg_mask()
70 struct device_node *np = dev->dev->of_node; in ast_detect_config_mode()
72 struct pci_dev *pdev = to_pci_dev(dev->dev); in ast_detect_config_mode()
[all …]
/Linux-v5.15/drivers/firmware/imx/
Dscu-pd.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
7 * Implementation of the SCU based Power Domains
10 * single global power domain and implement the ->attach|detach_dev()
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
18 * Additionally, we need to implement the ->stop() and ->start()
20 * rather than using the above ->power_on|off() callbacks.
23 * 1. The ->attach_dev() of power domain infrastructure still does
32 * Update: Genpd assigns the ->of_node for the virtual device before it
[all …]
/Linux-v5.15/drivers/cpuidle/
Dcpuidle-mvebu-v7.c7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
13 * Maintainer: Gregory CLEMENT <gregory.clement@free-electrons.com>
30 int index) in mvebu_v7_enter_idle() argument
36 if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE) in mvebu_v7_enter_idle()
45 return index; in mvebu_v7_enter_idle()
95 .desc = "CPU and SCU power down",
102 const struct platform_device_id *id = pdev->id_entry; in mvebu_v7_cpuidle_probe()
105 return -EINVAL; in mvebu_v7_cpuidle_probe()
107 mvebu_v7_cpu_suspend = pdev->dev.platform_data; in mvebu_v7_cpuidle_probe()
109 return cpuidle_register((struct cpuidle_driver *)id->driver_data, NULL); in mvebu_v7_cpuidle_probe()
[all …]
/Linux-v5.15/drivers/gpu/drm/aspeed/
Daspeed_gfx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 struct regmap *scu; member
38 #define CRT_XSCALE 0x8C /* CRT Scaling-Up Factor */
54 #define OSD_COLOR1 0xE0 /* OSD Color Palette Index 1 & 0 */
55 #define OSD_COLOR2 0xE4 /* OSD Color Palette Index 3 & 2 */
56 #define OSD_COLOR3 0xE8 /* OSD Color Palette Index 5 & 4 */
57 #define OSD_COLOR4 0xEC /* OSD Color Palette Index 7 & 6 */
58 #define OSD_COLOR5 0xF0 /* OSD Color Palette Index 9 & 8 */
59 #define OSD_COLOR6 0xF4 /* OSD Color Palette Index 11 & 10 */
60 #define OSD_COLOR7 0xF8 /* OSD Color Palette Index 13 & 12 */
[all …]
/Linux-v5.15/arch/x86/platform/intel-mid/
Dpwr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * pci_platform_pm_ops (see drivers/pci/pci-mid.c).
27 #include <asm/intel-mid.h>
108 return readl(pwr->regs + PM_SSS(reg)); in mid_pwr_get_state()
113 writel(value, pwr->regs + PM_SSC(reg)); in mid_pwr_set_state()
118 writel(value, pwr->regs + PM_WKC(reg)); in mid_pwr_set_wake()
123 writel(~PM_ICS_IE, pwr->regs + PM_ICS); in mid_pwr_interrupt_disable()
128 return !!(readl(pwr->regs + PM_STS) & PM_STS_BUSY); in mid_pwr_is_busy()
142 } while (--count); in mid_pwr_wait()
144 return -EBUSY; in mid_pwr_wait()
[all …]
/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-class-scsi_host6 SCU controller. The Intel(R) C600 Series Chipset SATA/SAS
7 Storage Control Unit embeds up to two 4-port controllers in
12 the controller index: '0' for the first controller,
34 Contact: linux-ide@vger.kernel.org
60 a) It does not use host-initiated slumber mode, but it does
61 allow device-initiated slumber
68 Contact: linux-ide@vger.kernel.org
79 protocol that is being used by the driver (for eg. LED, SAF-TE,
80 SES-2, SGPIO etc).
87 Contact: linux-ide@vger.kernel.org
[all …]
/Linux-v5.15/arch/arm64/boot/dts/apm/
Dapm-shadowcat.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
/Linux-v5.15/drivers/pinctrl/freescale/
Dpinctrl-imx.c1 // SPDX-License-Identifier: GPL-2.0+
28 #include "pinctrl-imx.h"
41 for (i = 0; i < pctldev->num_groups; i++) { in imx_pinctrl_find_group_by_name()
43 if (grp && !strcmp(grp->name, name)) in imx_pinctrl_find_group_by_name()
53 seq_printf(s, "%s", dev_name(pctldev->dev)); in imx_pin_dbg_show()
61 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_dt_node_to_map()
73 grp = imx_pinctrl_find_group_by_name(pctldev, np->name); in imx_dt_node_to_map()
75 dev_err(ipctl->dev, "unable to find group for node %pOFn\n", np); in imx_dt_node_to_map()
76 return -EINVAL; in imx_dt_node_to_map()
79 if (info->flags & IMX_USE_SCU) { in imx_dt_node_to_map()
[all …]

12