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/Linux-v5.15/arch/ia64/kernel/
Dsignal.c44 restore_sigcontext (struct sigcontext __user *sc, struct sigscratch *scr) in restore_sigcontext() argument
59 err |= __get_user(scr->pt.ar_unat, &sc->sc_ar_unat); in restore_sigcontext()
60 err |= __get_user(scr->pt.ar_fpsr, &sc->sc_ar_fpsr); in restore_sigcontext()
61 err |= __get_user(scr->pt.ar_pfs, &sc->sc_ar_pfs); in restore_sigcontext()
62 err |= __get_user(scr->pt.pr, &sc->sc_pr); /* predicates */ in restore_sigcontext()
63 err |= __get_user(scr->pt.b0, &sc->sc_br[0]); /* b0 (rp) */ in restore_sigcontext()
64 err |= __get_user(scr->pt.b6, &sc->sc_br[6]); /* b6 */ in restore_sigcontext()
65 err |= __copy_from_user(&scr->pt.r1, &sc->sc_gr[1], 8); /* r1 */ in restore_sigcontext()
66 err |= __copy_from_user(&scr->pt.r8, &sc->sc_gr[8], 4*8); /* r8-r11 */ in restore_sigcontext()
67 err |= __copy_from_user(&scr->pt.r12, &sc->sc_gr[12], 2*8); /* r12-r13 */ in restore_sigcontext()
[all …]
/Linux-v5.15/drivers/mfd/
Dtc6393xb.c89 void __iomem *scr; member
129 tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); in tc6393xb_nand_enable()
227 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
229 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
231 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
233 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
249 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
251 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
253 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
255 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
[all …]
Dt7l66xb.c59 void __iomem *scr; member
85 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); in t7l66xb_mmc_enable()
87 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); in t7l66xb_mmc_enable()
91 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, in t7l66xb_mmc_enable()
105 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); in t7l66xb_mmc_disable()
107 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); in t7l66xb_mmc_disable()
120 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state); in t7l66xb_mmc_pwr()
127 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state); in t7l66xb_mmc_clk_div()
184 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & in t7l66xb_irq()
185 ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) in t7l66xb_irq()
[all …]
Dtc6387xb.c23 void __iomem *scr; member
65 tmio_core_mmc_resume(tc6387xb->scr + 0x200, 0, in tc6387xb_resume()
81 tmio_core_mmc_pwr(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_pwr()
88 tmio_core_mmc_clk_div(tc6387xb->scr + 0x200, 0, state); in tc6387xb_mmc_clk_div()
98 tmio_core_mmc_enable(tc6387xb->scr + 0x200, 0, in tc6387xb_mmc_enable()
171 tc6387xb->scr = ioremap(rscr->start, resource_size(rscr)); in tc6387xb_probe()
172 if (!tc6387xb->scr) { in tc6387xb_probe()
191 iounmap(tc6387xb->scr); in tc6387xb_probe()
207 iounmap(tc6387xb->scr); in tc6387xb_remove()
/Linux-v5.15/drivers/media/tuners/
Dtda827x.c337 u8 scr; member
343 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
344 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
345 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
346 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
347 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
348 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
349 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
350 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
351 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
[all …]
/Linux-v5.15/sound/soc/mxs/
Dmxs-saif.c81 u32 scr; in mxs_saif_set_clk() local
102 scr = __raw_readl(master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
103 scr &= ~BM_SAIF_CTRL_BITCLK_MULT_RATE; in mxs_saif_set_clk()
104 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
127 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
134 scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
144 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
155 __raw_writel(scr, master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
167 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(4); in mxs_saif_set_clk()
170 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(3); in mxs_saif_set_clk()
[all …]
/Linux-v5.15/Documentation/s390/
Dconfig3270.sh22 SCR=$ROOT/tmp/mkdev3270
23 SCRTMP=$SCR.a
37 echo "#!/bin/sh" > $SCR || exit 1
38 echo " " >> $SCR
39 echo "# Script built by /sbin/config3270" >> $SCR
41 echo rm -rf "$D/$SUBD/*" >> $SCR
46 echo mkdir -p $D/$SUBD >> $SCR
56 echo mknod $D/$TUB c $fsmaj 0 >> $SCR
57 echo chmod 666 $D/$TUB >> $SCR
61 echo mknod $D/$TUB$devno c $fsmaj $min >> $SCR
[all …]
/Linux-v5.15/net/netfilter/
Dnf_conntrack_proto_dccp.c90 #define sCR CT_DCCP_CLOSEREQ macro
139 * sCR -> sIG Ignore, conntrack might be out of sync
143 * sNO, sRQ, sRS, sPO. sOP, sCR, sCG, sTW, */
153 * sCR -> sIG Ignore, might be response to ignored Request
158 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
168 * sCR -> sCR Ack in CLOSEREQ MAY be processed (8.3.)
172 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
173 sIV, sIV, sPO, sPO, sOP, sCR, sCG, sIV
182 * sCR -> sCR Data in CLOSEREQ MAY be processed (8.3.)
186 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
[all …]
/Linux-v5.15/net/netfilter/ipvs/
Dip_vs_proto_sctp.c274 #define sCR IP_VS_SCTP_S_COOKIE_REPLIED macro
288 /* sNO, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL*/
289 /* d */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
290 /* i */{sI1, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sIN, sIN},
291 /* i_a */{sCW, sCW, sCW, sCS, sCR, sCO, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
292 /* c_e */{sCR, sIN, sIN, sCR, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
293 /* c_a */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sES, sES, sSS, sSR, sSA, sRJ, sCL},
294 /* s */{sSR, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sSR, sSS, sSR, sSA, sRJ, sCL},
295 /* s_a */{sCL, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sCL, sSR, sCL, sRJ, sCL},
296 /* s_c */{sCL, sCL, sCL, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sCL, sRJ, sCL},
[all …]
/Linux-v5.15/drivers/net/wan/
Dhdlc_ppp.c86 enum {INV = 0x10, IRC = 0x20, ZRC = 0x40, SCR = 0x80, SCA = 0x100, enumerator
263 RCR+ = Receive-Configure-Request (Good) scr = Send-Configure-Request
280 {IRC|SCR|3, INV , INV , INV , INV , INV , INV }, /* START */
282 { INV , INV ,STR|2, SCR|3 ,SCR|3, SCR|5 , INV }, /* TO+ */
284 { STA|0 ,IRC|SCR|SCA|5, 2 , SCA|5 ,SCA|6, SCA|5 ,SCR|SCA|5}, /* RCR+ */
285 { STA|0 ,IRC|SCR|SCN|3, 2 , SCN|3 ,SCN|4, SCN|3 ,SCR|SCN|3}, /* RCR- */
286 { STA|0 , STA|1 , 2 , IRC|4 ,SCR|3, 6 , SCR|3 }, /* RCA */
287 { STA|0 , STA|1 , 2 ,IRC|SCR|3,SCR|3,IRC|SCR|5, SCR|3 }, /* RCN */
289 { 0 , 1 , 1 , 3 , 3 , 5 , SCR|3 }, /* RTA */
318 if (action & (SCR | STR)) /* set Configure-Req/Terminate-Req timer */ in ppp_cp_event()
[all …]
/Linux-v5.15/arch/powerpc/platforms/85xx/
Dmpc85xx_mds.c66 int scr; in mpc8568_fixup_125_clock() local
70 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
72 if (scr < 0) in mpc8568_fixup_125_clock()
73 return scr; in mpc8568_fixup_125_clock()
75 err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK)); in mpc8568_fixup_125_clock()
85 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
87 if (scr < 0) in mpc8568_fixup_125_clock()
88 return scr; in mpc8568_fixup_125_clock()
90 err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); in mpc8568_fixup_125_clock()
/Linux-v5.15/drivers/mmc/core/
Dsd_ops.c263 __be32 *scr; in mmc_app_send_scr() local
265 /* NOTE: caller guarantees scr is heap-allocated */ in mmc_app_send_scr()
274 scr = kmalloc(sizeof(card->raw_scr), GFP_KERNEL); in mmc_app_send_scr()
275 if (!scr) in mmc_app_send_scr()
291 sg_init_one(&sg, scr, 8); in mmc_app_send_scr()
297 card->raw_scr[0] = be32_to_cpu(scr[0]); in mmc_app_send_scr()
298 card->raw_scr[1] = be32_to_cpu(scr[1]); in mmc_app_send_scr()
300 kfree(scr); in mmc_app_send_scr()
Dsd.c199 * Given a 64-bit response, decode to our card SCR structure.
203 struct sd_scr *scr = &card->scr; in mmc_decode_scr() local
212 pr_err("%s: unrecognised SCR structure version %d\n", in mmc_decode_scr()
217 scr->sda_vsn = UNSTUFF_BITS(resp, 56, 4); in mmc_decode_scr()
218 scr->bus_widths = UNSTUFF_BITS(resp, 48, 4); in mmc_decode_scr()
219 if (scr->sda_vsn == SCR_SPEC_VER_2) in mmc_decode_scr()
221 scr->sda_spec3 = UNSTUFF_BITS(resp, 47, 1); in mmc_decode_scr()
223 if (scr->sda_spec3) { in mmc_decode_scr()
224 scr->sda_spec4 = UNSTUFF_BITS(resp, 42, 1); in mmc_decode_scr()
225 scr->sda_specx = UNSTUFF_BITS(resp, 38, 4); in mmc_decode_scr()
[all …]
/Linux-v5.15/arch/sh/boards/mach-hp6xx/
Dpm.c101 u8 scr; in hp6x0_pm_enter() local
108 scr = inb(HD64461_PCC1SCR); in hp6x0_pm_enter()
109 scr |= HD64461_PCCSCR_VCC1; in hp6x0_pm_enter()
110 outb(scr, HD64461_PCC1SCR); in hp6x0_pm_enter()
/Linux-v5.15/sound/soc/fsl/
Dfsl_ssi.c122 u32 scr; member
212 * @i2s_net: I2S and Network mode configurations of SCR register
389 * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with
412 * to prevent online reconfigurations, then jump to set SCR directly in fsl_ssi_config_enable()
463 /* Enable all remaining bits in SCR */ in fsl_ssi_config_enable()
465 vals[dir].scr, vals[dir].scr); in fsl_ssi_config_enable()
492 * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers
505 u32 sier, srcr, stcr, scr; in fsl_ssi_config_disable() local
522 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
524 /* Disable safe bits of SCR register for the current stream */ in fsl_ssi_config_disable()
[all …]
/Linux-v5.15/drivers/staging/media/atomisp/pci/runtime/binary/src/
Dbinary.c269 struct sh_css_binary_sc_requirements *scr) /* [out] */ in sh_css_binary_get_sc_requirements() argument
461 scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; in sh_css_binary_get_sc_requirements()
462 scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; in sh_css_binary_get_sc_requirements()
463 scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; in sh_css_binary_get_sc_requirements()
464 scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; in sh_css_binary_get_sc_requirements()
465 scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; in sh_css_binary_get_sc_requirements()
466 scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; in sh_css_binary_get_sc_requirements()
469 scr->bayer_scale_hor_ratio_in, in sh_css_binary_get_sc_requirements()
470 scr->bayer_scale_hor_ratio_out, in sh_css_binary_get_sc_requirements()
471 scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, in sh_css_binary_get_sc_requirements()
[all …]
/Linux-v5.15/drivers/spi/
Dspi-ep93xx.c110 * @div_scr: pointer to return the scr divider
117 int cpsr, scr; in ep93xx_spi_calc_divisors() local
128 * rate = spi_clock_rate / (cpsr * (1 + scr)) in ep93xx_spi_calc_divisors()
130 * cpsr must be even number and starts from 2, scr can be any number in ep93xx_spi_calc_divisors()
134 for (scr = 0; scr <= 255; scr++) { in ep93xx_spi_calc_divisors()
135 if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) { in ep93xx_spi_calc_divisors()
136 *div_scr = (u8)scr; in ep93xx_spi_calc_divisors()
169 dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", in ep93xx_spi_chip_setup()
/Linux-v5.15/drivers/ata/
Dsata_uli.c33 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
35 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
103 static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) in uli_scr_cfg_write() argument
106 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); in uli_scr_cfg_write()
Dsata_via.c75 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
76 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
201 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val) in vt8251_scr_read() argument
209 switch (scr) { in vt8251_scr_read()
250 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val) in vt8251_scr_write() argument
256 switch (scr) { in vt8251_scr_write()
315 * SCR registers on vt6420 are pieces of shit and may hang the
317 * To avoid such catastrophe, vt6420 doesn't provide generic SCR
338 /* don't do any SCR stuff if we're not loading */ in vt6420_prereset()
Dpata_pdc2027x.c601 u32 scr; in pdc_detect_pll_input_clock() local
607 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
608 PDPRINTK("scr[%X]\n", scr); in pdc_detect_pll_input_clock()
609 iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
624 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
625 PDPRINTK("scr[%X]\n", scr); in pdc_detect_pll_input_clock()
626 iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
Dlibata-sata.c29 * @link: ATA link to test SCR accessibility for
48 * sata_scr_read - read SCR register of the specified port
49 * @link: ATA link to read SCR for
50 * @reg: SCR to read
53 * Read SCR register @reg of @link into *@val. This function is
76 * sata_scr_write - write SCR register of the specified port
77 * @link: ATA link to write SCR for
78 * @reg: SCR to write
81 * Write @val to SCR register @reg of @link. This function is
104 * sata_scr_write_flush - write SCR register of the specified port and flush
[all …]
/Linux-v5.15/drivers/atm/
Dhorizon.c158 rtVBR(pcr,scr,mbs) scr bandwidth always available, up to pcr at mbs too
162 nrtVBR(pcr,scr,mbs) scr bandwidth always available, up to pcr at mbs too
167 pcr and scr have associated cdvt values
168 mcr is like scr but has no cdtv
213 and two timers (PCR and SCR) associated with it that can be used to
1487 // SCR timer in setup_idle_tx_channel()
2261 // int scr = atm_scr_goal (txtp); in hrz_open()
2262 int scr = pcr/2; // just for fun in hrz_open()
2278 if (!scr) { in hrz_open()
2284 scr = dev->tx_avail; in hrz_open()
[all …]
/Linux-v5.15/drivers/tty/serial/8250/
D8250_uniphier.c20 * - No SCR (Instead, CHAR can be used as a scratch register)
64 * IO callbacks must be overridden for correct access to FCR, LCR, MCR and SCR.
72 /* No SCR for this hardware. Use CHAR as a scratch register */ in uniphier_serial_in()
102 /* No SCR for this hardware. Use CHAR as a scratch register */ in uniphier_serial_out()
/Linux-v5.15/Documentation/userspace-api/media/v4l/
Dpixfmt-meta-uvc.rst26 SCR field or with that field identical to the previous header), or generally to
51 - The rest of the header, possibly including UVC PTS and SCR fields
/Linux-v5.15/drivers/tty/serial/
Domap-serial.c58 /* SCR register bitmasks */
138 unsigned char scr; member
290 if (up->scr & OMAP_UART_SCR_TX_EMPTY) { in serial_omap_stop_tx()
298 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
299 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
318 up->scr |= OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
319 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
394 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_start_tx()
395 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_start_tx()
903 up->scr = 0; in serial_omap_set_termios()
[all …]

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