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/Linux-v6.1/Documentation/devicetree/bindings/display/msm/
Ddpu-sc7280.yaml1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SC7280
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7280.
19 const: qcom,sc7280-mdss
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Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
19 - qcom,sc7180-dp
20 - qcom,sc7280-dp
21 - qcom,sc7280-edp
22 - qcom,sc8180x-dp
23 - qcom,sc8180x-edp
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/Linux-v6.1/drivers/iommu/arm/arm-smmu/
Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
12 #include "arm-smmu.h"
13 #include "arm-smmu-qcom.h"
15 #define QCOM_DUMMY_VAL -1
30 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in qcom_smmu_tlb_sync()
53 if (qsmmu->stall_enabled & BIT(idx)) in qcom_adreno_smmu_write_sctlr()
63 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
64 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
66 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
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/Linux-v6.1/drivers/gpu/drm/msm/
Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
49 struct icc_path *path0 = of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
50 struct icc_path *path1 = of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
55 msm_mdss->path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
56 msm_mdss->num_paths = 1; in msm_mdss_parse_data_bus_icc_path()
59 msm_mdss->path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
60 msm_mdss->num_paths++; in msm_mdss_parse_data_bus_icc_path()
71 for (i = 0; i < msm_mdss->num_paths; i++) in msm_mdss_put_icc_path()
72 icc_put(msm_mdss->path[i]); in msm_mdss_put_icc_path()
79 for (i = 0; i < msm_mdss->num_paths; i++) in msm_mdss_icc_request_bw()
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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 SoC device tree source
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
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Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
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/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
48 #define DPU_HW_VER_720 DPU_HW_VER(7, 2, 0) /* sc7280 */
81 * @DPU_MDP_BWC, MDSS HW supports Bandwidth compression.
99 * SSPP sub-blocks/features
107 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
110 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
143 * MIXER sub-blocks/features
145 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
161 * DSPP sub-blocks
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