Searched +full:rzv2m +full:- +full:pinctrl (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzv2m-pinctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Geert Uytterhoeven <geert+renesas@glider.be>11 - Phil Edworthy <phil.edworthy@renesas.com>15 Pin multiplexing and GPIO configuration is performed on a per-pin basis.22 const: renesas,r9a09g011-pinctrl # RZ/V2M27 gpio-controller: true29 '#gpio-cells':[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a09g011-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;18 compatible = "fixed-clock";19 #clock-cells = <0>;21 clock-frequency = <0>;25 #address-cells = <1>;26 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 /dts-v1/;10 #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>22 stdout-path = "serial0:115200n8";41 renesas,no-ether-link;42 phy-handle = <&phy0>;43 phy-mode = "gmii";46 phy0: ethernet-phy@0 {47 compatible = "ethernet-phy-id001c.c916",48 "ethernet-phy-ieee802.3-c22";[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_PINCTRL_SH_PFC) += core.o pinctrl.o3 obj-$(CONFIG_PINCTRL_SH_PFC_GPIO) += gpio.o4 obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o5 obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o6 obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o7 obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o8 obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o9 obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o10 obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o[all …]
1 // SPDX-License-Identifier: GPL-2.018 #include <linux/pinctrl/pinconf-generic.h>19 #include <linux/pinctrl/pinconf.h>20 #include <linux/pinctrl/pinctrl.h>21 #include <linux/pinctrl/pinmux.h>24 #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>30 #define DRV_NAME "pinctrl-rzv2m"144 rzv2m_writel_we(pctrl->base + DI_MSK(port), pin, 1); in rzv2m_pinctrl_set_pfc_mode()145 rzv2m_writel_we(pctrl->base + EN_MSK(port), pin, 1); in rzv2m_pinctrl_set_pfc_mode()148 addr = pctrl->base + PFSEL(port) + (pin / 4) * 4; in rzv2m_pinctrl_set_pfc_mode()[all …]