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/Linux-v6.1/Documentation/devicetree/bindings/serial/
Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 uart-has-rtscts: true
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D8250_omap.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
13 - $ref: /schemas/serial/serial.yaml#
14 - $ref: /schemas/serial/rs485.yaml#
19 - enum:
20 - ti,am3352-uart
21 - ti,am4372-uart
22 - ti,am654-uart
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Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/rs485.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RS485 serial communications Bindings
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
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Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: "serial.yaml"
14 - $ref: "rs485.yaml"
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
21 - items:
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/Linux-v6.1/arch/arm/boot/dts/
Dimx6qdl-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
26 * GPIO line, however the i.MX6 UART driver assumes RX happens
27 * during TX anyway and that it only controls drive enable DE
28 * line. Hence, the RX is always enabled here.
30 rs485-rx-en-hog {
31 gpio-hog;
33 line-name = "rs485-rx-en";
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Dstm32mp15xx-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
17 stdout-path = "serial0:115200n8";
32 * GPIO line, however the STM32 UART driver assumes RX happens
33 * during TX anyway and that it only controls drive enable DE
34 * line. Hence, the RX is always enabled here.
36 rs485-rx-en-hog {
37 gpio-hog;
39 output-low;
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Dimx6ul-kontron-bl-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
11 gpio-leds {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "debug-led1";
19 default-state = "off";
20 linux,default-trigger = "heartbeat";
24 label = "debug-led2";
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Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
20 /delete-property/ mmc2;
24 compatible = "gpio-beeper";
29 stdout-path = &uart6;
32 gpio_buttons: gpio-keys {
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Dam335x-nano.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
40 pinctrl-single,pins = <
46 pinctrl-single,pins = <
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Dimx6qdl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 /delete-property/ mmc2;
19 /delete-property/ mmc3;
24 stdout-path = &uart2;
[all …]
Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
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/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "imx8mp-verdin-dahlia.dtsi"
11 reg_eth2phy: regulator-eth2phy {
12 compatible = "regulator-fixed";
13 enable-active-high;
15 off-on-delay = <500000>;
16 regulator-max-microvolt = <3300000>;
17 regulator-min-microvolt = <3300000>;
18 regulator-name = "+V3.3_ETH";
19 startup-delay-us = <200000>;
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Dimx8mm-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "imx8mm-verdin-dahlia.dtsi"
9 sound_card: sound-card {
10 compatible = "simple-audio-card";
11 simple-audio-card,bitclock-master = <&dailink_master>;
12 simple-audio-card,format = "i2s";
13 simple-audio-card,frame-master = <&dailink_master>;
14 simple-audio-card,name = "imx8mm-nau8822";
15 simple-audio-card,routing =
26 simple-audio-card,widgets =
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/Linux-v6.1/include/linux/
Dserial_8250.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
47 * the numbering here, except for the legacy entry being -1.
50 PLAT8250_DEV_LEGACY = -1,
81 struct hrtimer start_tx_timer; /* "rs485 start tx" timer */
82 struct hrtimer stop_tx_timer; /* "rs485 stop tx" timer */
85 unsigned int tx_stopped:1; /* tx is currently stopped */
101 bool fifo_bug; /* min RX trigger if enabled */
110 unsigned char canary; /* non-zero during system sleep
/Linux-v6.1/drivers/tty/serial/
Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
30 #include <linux/dma-mapping.h>
33 #include <linux/dma/imx-dma.h>
124 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
153 #define UTS_LOOP (1<<12) /* Loop tx and rx */
160 /* We've been assigned a range on the "Low-density serial ports" major */
169 * filling the TX fifo incase CTS has been dropped.
173 #define DRIVER_NAME "IMX-uart"
268 { .compatible = "fsl,imx6q-uart", .data = &imx_uart_devdata[IMX6Q_UART], },
269 { .compatible = "fsl,imx53-uart", .data = &imx_uart_devdata[IMX53_UART], },
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Damba-pl011.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2010 ST-Ericsson SA
11 * This is a generic driver for ARM AMBA-type serial ports. They
12 * have a lot of 16550-like features, but are not register compatible.
34 #include <linux/dma-mapping.h>
82 /* The size of the array - must be last */
260 unsigned int fifosize; /* vendor-specific */
261 unsigned int fixed_baud; /* vendor-set fixed baud rate */
280 return uap->reg_offset[reg]; in pl011_reg_to_offset()
286 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
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Domap-serial.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for OMAP-UART controller.
16 * this driver as required for the omap-platform.
38 #include <linux/platform_data/serial-omap.h>
79 #define OMAP_UART_DMA_CH_FREE -1
108 * Buffer for rx dma. It is not required for tx because the buffer
118 /* timer to poll activity on rx dma */
176 offset <<= up->port.regshift; in serial_in()
177 return readw(up->port.membase + offset); in serial_in()
182 offset <<= up->port.regshift; in serial_out()
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Datmel_serial.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
47 * These two offsets are substracted from the RX FIFO size to define the RTS
63 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
72 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
116 u32 backup_imr; /* IMR saved during suspend */
121 short pdc_rx_idx; /* current PDC RX buffer */
147 u32 backup_mode; /* MR saved during iso7816 operations */
148 u32 backup_brgr; /* BRGR saved during iso7816 operations */
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Dsc16is7xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
33 #define SC16IS7XX_RHR_REG (0x00) /* RX FIFO */
34 #define SC16IS7XX_THR_REG (0x00) /* TX FIFO */
43 #define SC16IS7XX_TXLVL_REG (0x08) /* TX FIFO level */
44 #define SC16IS7XX_RXLVL_REG (0x09) /* RX FIFO level */
46 * - only on 75x/76x
49 * - only on 75x/76x
52 * - only on 75x/76x
55 * - only on 75x/76x
[all …]
Dfsl_lpuart.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2012-2014 Freescale Semiconductor, Inc.
11 #include <linux/dma-mapping.h>
25 /* All registers are 8-bit width */
114 /* 32-bit global registers only for i.MX7ULP/i.MX8x
119 /* 32-bit register definition */
233 /* Rx DMA timeout in ms, which is used to calculate Rx ring buffer size */
236 #define DRIVER_NAME "fsl-lpuart"
321 { .compatible = "fsl,vf610-lpuart", .data = &vf_data, },
322 { .compatible = "fsl,ls1021a-lpuart", .data = &ls1021a_data, },
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Dstm32-usart.c1 // SPDX-License-Identifier: GPL-2.0
9 * Inspired by st-asc.c from STMicroelectronics (c)
15 #include <linux/dma-direction.h>
17 #include <linux/dma-mapping.h>
36 #include "stm32-usart.h"
120 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits()
122 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits()
129 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits()
131 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits()
137 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; in stm32_usart_tx_empty()
[all …]
Dserial_core.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
39 * lockdep: port->lock is initialized in two places, but we
40 * want only one lock-class:
44 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
61 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled()
66 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref()
67 return state->uart_port; in uart_port_ref()
73 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref()
74 wake_up(&uport->state->remove_wait); in uart_port_deref()
[all …]
/Linux-v6.1/drivers/tty/serial/8250/
D8250_port.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Base port operations for 8250/16550-type serial ports
254 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
255 * workaround of errata A-008006 which states that tx_loadsz should
267 .name = "Palmchip BK-3103",
337 #define UART_REG_UNMAPPED -1
369 return __raw_readl(p->membase + (offset << p->regshift)); in au_serial_in()
379 __raw_writel(value, p->membase + (offset << p->regshift)); in au_serial_out()
385 return __raw_readl(up->port.membase + 0x28); in au_serial_dl_read()
390 __raw_writel(value, up->port.membase + 0x28); in au_serial_dl_write()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0
23 non-standard serial ports, since the configuration information will
51 If you did not notice yet and/or you have userspace from pre-3.7, it
74 bool "Support for Fintek F81216A LPC to 4 UART RS485 API"
77 Selecting this option will add support for the RS485 capabilities
140 Note that serial ports on NetMos 9835 Multi-I/O cards are handled
161 Say Y here to enable support for 16-bit PCMCIA serial devices,
163 multi-function Ethernet/modem cards. (PCMCIA- or PC-cards are
164 credit-card size devices often used with laptops.)
190 PCI enumeration and any ports that may be added at run-time
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/Linux-v6.1/Documentation/firmware-guide/acpi/
Denumeration.rst1 .. SPDX-License-Identifier: GPL-2.0
13 that are accessed through memory-mapped registers.
15 In order to support this and re-use the existing drivers as much as
18 - Devices that have no bus connector resource are represented as
21 - Devices behind real busses where there is a connector resource
34 This means that when ACPI_HANDLE(dev) returns non-NULL the device was
36 device-specific configuration. There is an example of this below.
43 for the device and add supported ACPI IDs. If this same IP-block is used on
44 some other non-ACPI platform, the driver might work out of the box or needs
120 to a specific FixedDMA resource. By default "tx" means the first entry of the
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