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/Linux-v6.6/sound/soc/ux500/
Dux500_msp_i2s.c138 writel(temp_reg, msp->registers + MSP_TCF); in set_prot_desc_tx()
166 writel(temp_reg, msp->registers + MSP_RCF); in set_prot_desc_rx()
203 temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING; in configure_protocol()
205 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
206 temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING; in configure_protocol()
208 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
222 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
223 writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR); in setup_bitclk()
255 writel(temp_reg, msp->registers + MSP_SRG); in setup_bitclk()
261 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
[all …]
/Linux-v6.6/Documentation/trace/coresight/
Dcoresight-etm4x-reference.rst17 ETMv4 registers that they effect. Note the register names are given without
23 :Trace Registers: {CONFIGR + others}
27 other registers to enable the features requested.
40 :Trace Registers: All
50 :Trace Registers: PRGCTLR, All hardware regs.
63 :Trace Registers: None.
75 :Trace Registers: None.
89 :Trace Registers: None.
102 :Trace Registers: ACVR[idx, idx+1], VIIECTLR
125 :Trace Registers: ACVR[idx]
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/Linux-v6.6/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc18 # general status registers
51 # frame format description registers
91 # analog gain description registers
110 # data format description registers
122 # general set-up registers
170 # integration time registers
174 # analog gain registers
179 # digital gain registers
182 # hdr control registers
203 # clock set-up registers
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/Linux-v6.6/drivers/net/can/ctucanfd/
Dctucanfd_kregs.h97 /* DEVICE_ID VERSION registers */
102 /* MODE SETTINGS registers */
123 /* STATUS registers */
135 /* COMMAND registers */
144 /* INT_STAT registers */
158 /* INT_ENA_SET registers */
161 /* INT_ENA_CLR registers */
164 /* INT_MASK_SET registers */
167 /* INT_MASK_CLR registers */
170 /* BTR registers */
[all …]
/Linux-v6.6/drivers/video/fbdev/i810/
Di810_regs.h25 * All GC registers are memory-mapped. In addition, the VGA and extended VGA registers
32 /* Instruction and Interrupt Control Registers (01000h 02FFFh) */
60 /* Memory Control Registers (03000h 03FFFh) */
66 /* Span Cursor Registers (04000h 04FFFh) */
69 /* I/O Control Registers (05000h 05FFFh) */
75 /* Clock Control and Power Management Registers (06000h 06FFFh) */
86 /* Overlay Registers (30000h 03FFFFh) */
146 /* LCD/TV-Out and HW DVD Registers (60000h 6FFFFh) */
158 /* Display and Cursor Control Registers (70000h 7FFFFh) */
172 /* VGA Registers */
[all …]
/Linux-v6.6/drivers/gpu/drm/msm/hdmi/
Dqfprom.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
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/Linux-v6.6/include/uapi/linux/
Delf.h390 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
391 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
392 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
396 #define NT_PPC_EBB 0x106 /* Event Based Branch Registers */
397 #define NT_PPC_PMU 0x107 /* Performance Monitor Registers */
398 #define NT_PPC_TM_CGPR 0x108 /* TM checkpointed GPR Registers */
399 #define NT_PPC_TM_CFPR 0x109 /* TM checkpointed FPR Registers */
400 #define NT_PPC_TM_CVMX 0x10a /* TM checkpointed VMX Registers */
401 #define NT_PPC_TM_CVSX 0x10b /* TM checkpointed VSX Registers */
402 #define NT_PPC_TM_SPR 0x10c /* TM Special Purpose Registers */
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/Linux-v6.6/drivers/gpu/drm/msm/dsi/
Dsfpb.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
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Dmmss_cc.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
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Ddsi_phy_10nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
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Ddsi_phy_20nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_28nm_8960.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
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/Linux-v6.6/drivers/gpu/drm/msm/disp/
Dmdp_common.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 944 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 18746 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
/Linux-v6.6/drivers/accel/habanalabs/include/gaudi2/arc/
Dgaudi2_arc_common_packets.h99 * Extension registers
104 * Extension registers
111 * Extension registers
118 * Extension registers
125 * Extension registers
133 * Extension registers
141 * Extension registers
149 * Extension registers
157 * Extension registers
163 * Extension registers
[all …]
/Linux-v6.6/drivers/scsi/smartpqi/
Dsmartpqi_sis.c100 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_wait_for_ctrl_ready_with_timeout()
106 &ctrl_info->registers->sis_mailbox[7])); in sis_wait_for_ctrl_ready_with_timeout()
141 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_is_firmware_running()
151 readl(&ctrl_info->registers->sis_mailbox[7])); in sis_is_firmware_running()
158 return readl(&ctrl_info->registers->sis_firmware_status) & in sis_is_kernel_up()
164 return readl(&ctrl_info->registers->sis_product_identifier); in sis_get_product_id()
175 struct pqi_ctrl_registers __iomem *registers; in sis_send_sync_cmd() local
181 registers = ctrl_info->registers; in sis_send_sync_cmd()
184 writel(cmd, &registers->sis_mailbox[0]); in sis_send_sync_cmd()
191 writel(params->mailbox[i], &registers->sis_mailbox[i]); in sis_send_sync_cmd()
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/Linux-v6.6/Documentation/devicetree/bindings/pinctrl/
Dnxp,s32g2-siul2-pinctrl.yaml21 IMCR registers need to be revealed for kernel to configure pinmux.
41 - description: MSCR registers group 0 in SIUL2_0
42 - description: MSCR registers group 1 in SIUL2_1
43 - description: MSCR registers group 2 in SIUL2_1
44 - description: IMCR registers group 0 in SIUL2_0
45 - description: IMCR registers group 1 in SIUL2_1
46 - description: IMCR registers group 2 in SIUL2_1
96 /* MSCR0-MSCR101 registers on siul2_0 */
98 /* MSCR112-MSCR122 registers on siul2_1 */
100 /* MSCR144-MSCR190 registers on siul2_1 */
[all …]
/Linux-v6.6/sound/soc/codecs/
Dtlv320aic3x.h57 /* ADC PGA Gain control registers */
60 /* MIC3 control registers */
63 /* Line1 Input control registers */
68 /* Line2 Input control registers */
74 /* AGC Control Registers A, B, C */
82 /* DAC Power and Left High Power Output control registers */
85 /* Right High Power Output control registers */
89 /* DAC Output Switching control registers */
91 /* High Power Output Driver Pop Reduction registers */
93 /* DAC Digital control registers */
[all …]
/Linux-v6.6/arch/xtensa/variants/csp/include/variant/
Dtie-asm.h58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional global registers used by default by the compiler:
88 // Optional caller-saved registers used by default by the compiler:
100 // Optional caller-saved registers not used by default by the compiler:
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/Linux-v6.6/arch/xtensa/variants/de212/include/variant/
Dtie-asm.h58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional caller-saved registers used by default by the compiler:
90 // Optional caller-saved registers not used by default by the compiler:
112 * (not including zero-overhead loop registers).
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/Linux-v6.6/Documentation/devicetree/bindings/arm/
Datmel-sysregs.txt1 Atmel system registers
5 - reg : Should contain registers location and length
9 - reg: Should contain registers location and length
15 - reg: Should contain registers location and length
21 - reg: Should contain registers location and length
35 - reg: Should contain registers location and length
46 - reg: Should contain registers location and length
55 Special Function Registers (SFR)
57 Special Function Registers (SFR) manage specific aspects of the integrated
66 - reg: Should contain registers location and length
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/Linux-v6.6/drivers/staging/qlge/
Dqlge_dbg.c86 /* Read out the SERDES registers */
341 /* Read the 400 xgmac control/statistics registers
351 /* We're reading 400 xgmac registers, but we filter out in qlge_get_xgmac_regs()
471 /* Read the MPI Processor shadow registers */
491 /* Read the MPI Processor core registers */
552 /* Read out the routing index registers */
593 /* Read out the MAC protocol registers */
747 sizeof(mpi_coredump->nic_regs), "NIC1 Registers"); in qlge_core_dump()
752 sizeof(mpi_coredump->nic2_regs), "NIC2 Registers"); in qlge_core_dump()
754 /* Get XGMac registers. (Segment 18, Rev C. step 21) */ in qlge_core_dump()
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/Linux-v6.6/arch/mips/include/uapi/asm/
Dkvm.h51 * registers. The id field is broken down as follows:
57 * Register set = 0: GP registers from kvm_regs (see definitions below).
59 * Register set = 1: CP0 registers.
62 * COP0 register set = 0: Main CP0 registers.
69 * Register set = 2: KVM specific registers (see definitions below).
71 * Register set = 3: FPU / MSA registers (see definitions below).
73 * Other sets registers may be added in the future. Each set would
84 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
126 * KVM_REG_MIPS_CP0 - Coprocessor 0 registers.
135 * KVM_REG_MIPS_KVM - KVM specific control registers.
[all …]
/Linux-v6.6/drivers/media/radio/si470x/
Dradio-si470x-common.c185 radio->registers[SYSCONFIG2] &= ~SYSCONFIG2_BAND; in si470x_set_band()
186 radio->registers[SYSCONFIG2] |= radio->band << 6; in si470x_set_band()
203 if ((radio->registers[POWERCFG] & (POWERCFG_ENABLE|POWERCFG_DMUTE)) in si470x_set_chan()
209 radio->registers[CHANNEL] &= ~CHANNEL_CHAN; in si470x_set_chan()
210 radio->registers[CHANNEL] |= CHANNEL_TUNE | chan; in si470x_set_chan()
222 if ((radio->registers[STATUSRSSI] & STATUSRSSI_STC) == 0) in si470x_set_chan()
229 radio->registers[CHANNEL] &= ~CHANNEL_TUNE; in si470x_set_chan()
242 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_SPACE) >> 4) { in si470x_get_step()
265 chan = radio->registers[READCHAN] & READCHAN_READCHAN; in si470x_get_freq()
327 radio->registers[POWERCFG] |= POWERCFG_SEEK; in si470x_set_seek()
[all …]
/Linux-v6.6/arch/xtensa/variants/dc233c/include/variant/
Dtie-asm.h59 * (not including zero-overhead loop registers).
63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
64 * registers are clobbered, the remaining are unused).
71 * select Select what category(ies) of registers to store, as a bitmask
72 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
73 * alloc Select what category(ies) of registers to allocate; if any
75 * the corresponding registers is skipped without doing any store.
89 // Optional caller-saved registers used by default by the compiler:
101 // Optional caller-saved registers not used by default by the compiler:
123 * (not including zero-overhead loop registers).
[all …]
/Linux-v6.6/drivers/net/ethernet/intel/ice/
Dice_ptp_hw.h78 * P_REG_DESK_PAR* registers may represent different clock markers at
166 * change, such as an update to the CGU registers.
239 /* Timestamp memory reset registers */
244 /* Timestamp availability status registers */
248 /* Tx FIFO status registers */
256 /* Interrupt control Config registers */
267 /* Tx Timestamp data registers */
274 /* Timestamp init registers */
280 /* Timestamp match and adjust target registers */
286 /* Timestamp capture registers */
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