Lines Matching full:registers
390 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
391 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
392 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
396 #define NT_PPC_EBB 0x106 /* Event Based Branch Registers */
397 #define NT_PPC_PMU 0x107 /* Performance Monitor Registers */
398 #define NT_PPC_TM_CGPR 0x108 /* TM checkpointed GPR Registers */
399 #define NT_PPC_TM_CFPR 0x109 /* TM checkpointed FPR Registers */
400 #define NT_PPC_TM_CVMX 0x10a /* TM checkpointed VMX Registers */
401 #define NT_PPC_TM_CVSX 0x10b /* TM checkpointed VSX Registers */
402 #define NT_PPC_TM_SPR 0x10c /* TM Special Purpose Registers */
406 #define NT_PPC_PKEY 0x110 /* Memory Protection Keys registers */
407 #define NT_PPC_DEXCR 0x111 /* PowerPC DEXCR registers */
418 #define NT_S390_CTRS 0x304 /* s390 control registers */
423 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 upper half */
424 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
425 #define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
429 #define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */
431 #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
432 #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
434 #define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension registers */
440 #define NT_ARM_SSVE 0x40b /* ARM Streaming SVE registers */
441 #define NT_ARM_ZA 0x40c /* ARM SME ZA registers */
442 #define NT_ARM_ZT 0x40d /* ARM SME ZT registers */
443 #define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
445 #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
447 #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
448 #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
449 #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
450 #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
451 #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
452 #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */
453 #define NT_LOONGARCH_LASX 0xa03 /* LoongArch Loongson Advanced SIMD Extension registers */
454 #define NT_LOONGARCH_LBT 0xa04 /* LoongArch Loongson Binary Translation registers */
455 #define NT_LOONGARCH_HW_BREAK 0xa05 /* LoongArch hardware breakpoint registers */
456 #define NT_LOONGARCH_HW_WATCH 0xa06 /* LoongArch hardware watchpoint registers */