| /Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | pllgt215.c | 42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
50 N = tmp / info->refclk; in gt215_pll_calc()
51 fN = tmp % info->refclk; in gt215_pll_calc()
54 if (fN >= info->refclk / 2) in gt215_pll_calc()
57 if (fN < info->refclk / 2) in gt215_pll_calc()
59 fN = tmp - (N * info->refclk); in gt215_pll_calc()
67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc()
75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc()
86 return info->refclk * *pN / *pM / *P; in gt215_pll_calc()
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| /Linux-v5.15/drivers/phy/ti/ |
| D | phy-dm816x-usb.c | 56 struct clk *refclk; member
86 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
87 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init()
133 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend()
144 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume()
161 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume()
236 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe()
237 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe()
238 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe()
239 error = clk_prepare(phy->refclk); in dm816x_usb_phy_probe()
[all …]
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| D | phy-ti-pipe3.c | 171 struct clk *refclk; member
607 phy->refclk = devm_clk_get(dev, "refclk"); in ti_pipe3_get_clk()
608 if (IS_ERR(phy->refclk)) { in ti_pipe3_get_clk()
609 dev_err(dev, "unable to get refclk\n"); in ti_pipe3_get_clk()
610 /* older DTBs have missing refclk in SATA PHY in ti_pipe3_get_clk()
614 return PTR_ERR(phy->refclk); in ti_pipe3_get_clk()
822 * Prevent auto-disable of refclk for SATA PHY due to Errata i783 in ti_pipe3_probe()
825 if (!IS_ERR(phy->refclk)) { in ti_pipe3_probe()
826 clk_prepare_enable(phy->refclk); in ti_pipe3_probe()
848 clk_disable_unprepare(phy->refclk); in ti_pipe3_remove()
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/usb/ |
| D | usb3503.txt | 18 - refclk: Clock used for driving REFCLK signal (optional, if not provided
23 - refclk-frequency: Frequency of the REFCLK signal as defined by REF_SEL
25 REFCLK signal and assume that a value from the primary reference
38 clock-names = "refclk";
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| D | octeon-usb.txt | 24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
54 cavium,refclk-type = "crystal";
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| D | dwc3-cavium.txt | 18 refclk-frequency = <0x05f5e100>;
19 refclk-type-ss = "dlmc_ref_clk0";
20 refclk-type-hs = "dlmc_ref_clk0";
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| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 1183 { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
1184 { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
1185 { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 },
1186 { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 },
1187 { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 },
1192 { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 },
1193 { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 },
1194 { .refclk = 19200, .cdclk = 316800, .divider = 2, .ratio = 33 },
1199 { .refclk = 19200, .cdclk = 172800, .divider = 2, .ratio = 18 },
1200 { .refclk = 19200, .cdclk = 192000, .divider = 2, .ratio = 20 },
[all …]
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| D | intel_dpll.c | 220 /* LVDS 100mhz refclk limits. */
300 int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params() argument
306 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in pnv_calc_dpll_params()
317 int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params() argument
323 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); in i9xx_calc_dpll_params()
329 int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params() argument
335 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in vlv_calc_dpll_params()
341 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params() argument
347 clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), in chv_calc_dpll_params()
355 * Returns whether the given set of divisors are valid for a given refclk with
[all …]
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| D | intel_dpll.h | 18 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
19 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
20 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
44 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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| /Linux-v5.15/drivers/gpu/drm/gma500/ |
| D | gma_display.h | 44 int target, int refclk,
49 void (*clock)(int refclk, struct gma_clock_t *clock);
50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
91 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
92 extern void gma_clock(int refclk, struct gma_clock_t *clock);
97 struct drm_crtc *crtc, int target, int refclk,
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| D | oaktrail_crtc.c | 38 int refclk, struct gma_clock_t *best_clock);
42 int refclk, struct gma_clock_t *best_clock);
81 int refclk) in mrst_limit() argument
110 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
111 static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock) in mrst_lvds_clock() argument
113 clock->dot = (refclk * clock->m) / (14 * clock->p1); in mrst_lvds_clock()
125 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() argument
150 actual_freq = (refclk * clock.m) / in mrst_sdvo_find_best_pll()
178 * Returns a set of divisors for the desired target clock with the given refclk,
183 int refclk, struct gma_clock_t *best_clock) in mrst_lvds_find_best_pll() argument
[all …]
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| D | cdv_intel_display.c | 24 int refclk, struct gma_clock_t *best_clock);
364 int refclk) in cdv_intel_limit() argument
372 if (refclk == 96000) in cdv_intel_limit()
378 if (refclk == 27000) in cdv_intel_limit()
383 if (refclk == 27000) in cdv_intel_limit()
392 static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) in cdv_intel_clock() argument
396 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock()
402 int refclk, in cdv_intel_find_dp_pll() argument
410 switch (refclk) { in cdv_intel_find_dp_pll()
447 gma_crtc->clock_funcs->clock(refclk, &clock); in cdv_intel_find_dp_pll()
[all …]
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| /Linux-v5.15/drivers/phy/xilinx/ |
| D | phy-zynqmp.c | 103 /* Refclk selection parameters */
191 * @refclk: reference clock index
200 unsigned int refclk; member
344 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll()
351 if (gtr_phy->refclk != gtr_phy->lane) { in xpsgtr_configure_pll()
354 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk); in xpsgtr_configure_pll()
769 unsigned int refclk; in xpsgtr_xlate() local
798 refclk = args->args[3]; in xpsgtr_xlate()
799 if (refclk >= ARRAY_SIZE(gtr_dev->refclk_sscs) || in xpsgtr_xlate()
800 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate()
[all …]
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| /Linux-v5.15/drivers/net/ethernet/arc/ |
| D | emac_rockchip.c | 32 struct clk *refclk; member
147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe()
148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe()
150 PTR_ERR(priv->refclk)); in emac_rockchip_probe()
151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe()
155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe()
195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe()
241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe()
255 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
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| /Linux-v5.15/arch/mips/bcm63xx/ |
| D | clk.c | 409 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
410 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
426 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
427 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
440 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
454 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
468 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
483 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
484 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
502 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
30 refclk-frequency = <24000000>;
32 refclk-type = "crystal";
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| /Linux-v5.15/drivers/net/ethernet/ti/ |
| D | cpts.c | 571 clk_enable(cpts->refclk); in cpts_register()
590 clk_disable(cpts->refclk); in cpts_register()
610 clk_disable(cpts->refclk); in cpts_unregister()
619 freq = clk_get_rate(cpts->refclk); in cpts_calc_mult_shift()
660 refclk_np = of_get_child_by_name(node, "cpts-refclk-mux"); in cpts_of_mux_clk_setup()
662 /* refclk selection supported not for all SoCs */ in cpts_of_mux_clk_setup()
770 cpts->refclk = devm_get_clk_from_child(dev, node, "cpts"); in cpts_create()
771 if (IS_ERR(cpts->refclk)) in cpts_create()
773 cpts->refclk = devm_clk_get(dev, "cpts"); in cpts_create()
775 if (IS_ERR(cpts->refclk)) { in cpts_create()
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 80 refclk-dig:
109 "^pll[0|1]-refclk$":
192 pll0-refclk {
199 pll1-refclk {
206 cmn-refclk-dig-div {
216 refclk-dig {
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | berlin2cd.dtsi | 51 refclk: oscillator { label
389 clocks = <&refclk>;
390 clock-names = "refclk";
446 clocks = <&refclk>;
453 clocks = <&refclk>;
461 clocks = <&refclk>;
486 clocks = <&refclk>;
497 clocks = <&refclk>;
507 clocks = <&refclk>;
532 clocks = <&refclk>;
[all …]
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| /Linux-v5.15/drivers/net/phy/ |
| D | smsc.c | 48 struct clk *refclk; member
298 clk_disable_unprepare(priv->refclk); in smsc_phy_remove()
299 clk_put(priv->refclk); in smsc_phy_remove()
321 priv->refclk = clk_get_optional(dev, NULL); in smsc_phy_probe()
322 if (IS_ERR(priv->refclk)) in smsc_phy_probe()
323 return dev_err_probe(dev, PTR_ERR(priv->refclk), in smsc_phy_probe()
326 ret = clk_prepare_enable(priv->refclk); in smsc_phy_probe()
330 ret = clk_set_rate(priv->refclk, 50 * 1000 * 1000); in smsc_phy_probe()
332 clk_disable_unprepare(priv->refclk); in smsc_phy_probe()
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| /Linux-v5.15/drivers/clk/berlin/ |
| D | bg2.c | 90 REFCLK, VIDEO_EXT0, enumerator
103 [REFCLK] = "refclk",
513 clk = of_clk_get_by_name(np, clk_names[REFCLK]); in berlin2_clock_setup()
515 clk_names[REFCLK] = __clk_get_name(clk); in berlin2_clock_setup()
527 clk_names[SYSPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
532 clk_names[MEMPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
537 clk_names[CPUPLL], clk_names[REFCLK], 0); in berlin2_clock_setup()
546 clk_names[REFCLK], avpll_flags, 0); in berlin2_clock_setup()
559 clk_names[REFCLK], BERLIN2_AVPLL_BIT_QUIRK | in berlin2_clock_setup()
574 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/clock/ |
| D | marvell,berlin.txt | 18 "refclk" for the SoCs oscillator input on all SoCs,
29 clocks = <&refclk>;
30 clock-names = "refclk";
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| /Linux-v5.15/sound/soc/meson/ |
| D | axg-spdifin.c | 55 struct clk *refclk; member
121 ret = clk_prepare_enable(priv->refclk); in axg_spdifin_startup()
140 clk_disable_unprepare(priv->refclk); in axg_spdifin_shutdown()
193 ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); in axg_spdifin_sample_mode_config()
203 rate = clk_get_rate(priv->refclk); in axg_spdifin_sample_mode_config()
489 priv->refclk = devm_clk_get(dev, "refclk"); in axg_spdifin_probe()
490 if (IS_ERR(priv->refclk)) { in axg_spdifin_probe()
491 ret = PTR_ERR(priv->refclk); in axg_spdifin_probe()
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| /Linux-v5.15/drivers/pinctrl/ralink/ |
| D | pinctrl-mt7620.c | 61 FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2),
64 static struct rt2880_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
80 FUNC("wdt refclk", 0, 17, 1),
84 FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1)
102 GRP("spi refclk", refclk_grp, 1, MT7620_GPIO_MODE_SPI_REF_CLK),
149 static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("refclk", 0, 37, 1) };
177 FUNC("refclk", 2, 6, 1),
191 FUNC("refclk", 2, 11, 1),
321 GRP("refclk", refclk_grp_mt7628, 1, MT7628_GPIO_MODE_REFCLK),
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| /Linux-v5.15/drivers/phy/ |
| D | phy-pistachio-usb.c | 38 unsigned int refclk; member
68 p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); in pistachio_usb_phy_power_on()
71 if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { in pistachio_usb_phy_power_on()
160 ret = of_property_read_u32(p_phy->dev->of_node, "img,refclk", in pistachio_usb_phy_probe()
161 &p_phy->refclk); in pistachio_usb_phy_probe()
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