Searched +full:ref +full:- +full:clock +full:- +full:frequency (Results 1 – 25 of 514) sorted by relevance
12345678910>>...21
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/ |
D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 18 $ref: /schemas/types.yaml#/definitions/phandle 21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt. 26 clock-names: [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/mfd/ |
D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of 25 [2] include/dt-bindings/pinctrl/lochnagar.h 26 [3] include/dt-bindings/clock/lochnagar.h 28 And these documents for the required sub-node binding details: 29 [4] Clock: ../clock/cirrus,lochnagar.yaml 35 - if: [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/net/wireless/ |
D | ti,wlcore.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 14 Note that the *-clock-frequency properties assume internal clocks. In case 15 of external clocks, new bindings (for parsing the clock nodes) have to be 21 - ti,wl1271 22 - ti,wl1273 23 - ti,wl1281 24 - ti,wl1283 [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/iio/frequency/ |
D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <michael.hennerich@analog.com> 15 - adi,adf4350 16 - adi,adf4351 21 spi-max-frequency: 26 description: Clock to provide CLKIN reference clock signal. 28 clock-names: [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/media/i2c/ |
D | aptina,mt9p031.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor 15 simple two-wire serial interface. 20 - aptina,mt9p006 21 - aptina,mt9p031 22 - aptina,mt9p031m [all …]
|
D | ovti,ov02a10.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Dongchun Zhu <dongchun.zhu@mediatek.com> 13 description: |- 14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel 17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The 18 sensor output is available via CSI-2 serial data output. 21 - $ref: /schemas/media/video-interface-devices.yaml# 33 clock-names: [all …]
|
D | sony,imx214.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Sony 1/3.06-Inch 13.13MP CMOS Digital Image Sensor 10 - Ricardo Ribalda <ribalda@kernel.org> 13 The Sony IMX214 is a 1/3.06-inch CMOS active pixel digital image sensor with 15 interface. Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a 19 - $ref: ../video-interface-devices.yaml# 27 - 0x10 28 - 0x1a [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/sound/ |
D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/simple-card.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 14 frame-master: 15 description: Indicates dai-link frame master. 16 $ref: /schemas/types.yaml#/definitions/phandle 18 bitclock-master: 19 description: Indicates dai-link bit clock master [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/net/can/ |
D | nxp,sja1000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfgang Grandegger <wg@grandegger.com> 15 - enum: 16 - nxp,sja1000 17 - technologic,sja1000 18 - items: 19 - enum: 20 - renesas,r9a06g032-sja1000 # RZ/N1D [all …]
|
D | fsl,flexcan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). 11 - Marc Kleine-Budde <mkl@pengutronix.de> 14 - $ref: can-controller.yaml# 19 - enum: 20 - fsl,imx8qm-flexcan 21 - fsl,imx8mp-flexcan 22 - fsl,imx6q-flexcan [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/clock/ |
D | nvidia,tegra124-car.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/nvidia,tegra124-car.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra Clock and Reset Controller 10 - Jon Hunter <jonathanh@nvidia.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 The Clock and Reset (CAR) is the HW module responsible for muxing and gating 18 the clock source programming and most of the clock dividers. 20 CLKGEN input signals include the external clock for the reference frequency [all …]
|
D | ti,lmk04832.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/ti,lmk04832.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Clock bindings for the Texas Instruments LMK04832 10 - Liam Beguin <liambeguin@gmail.com> 13 Devicetree binding for the LMK04832, a clock conditioner with JEDEC JESD204B 21 - ti,lmk04832 26 '#address-cells': 29 '#size-cells': [all …]
|
/Linux-v6.1/drivers/firmware/ |
D | ti_sci.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 9 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 28 /* Clock requests */ 53 /* PSI-L requests */ 82 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 103 * struct ti_sci_msg_resp_version - Response for a message 125 * struct ti_sci_msg_req_reboot - Reboot the SoC 136 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 143 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 147 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/i2c/ |
D | opencores,i2c-ocores.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Korsgaard <peter@korsgaard.com> 11 - Andrew Lunn <andrew@lunn.ch> 14 - $ref: /schemas/i2c/i2c-controller.yaml# 19 - items: 20 - enum: 21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/net/ |
D | qca,ar803x.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 18 - $ref: ethernet-phy.yaml# 21 qca,clk-out-frequency: 22 description: Clock output frequency in Hertz. 23 $ref: /schemas/types.yaml#/definitions/uint32 [all …]
|
/Linux-v6.1/arch/arm/boot/dts/ |
D | tegra30-asus-tf300t.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 5 #include "tegra30-asus-lvds-display.dtsi" 12 tf300t-init-hog { 13 gpio-hog; 15 output-low; 27 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 35 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 43 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
|
D | tegra30-asus-tf300tg.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 5 #include "tegra30-asus-lvds-display.dtsi" 12 tf300tg-init-hog { 13 gpio-hog; 28 output-low; 39 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 47 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 55 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
|
D | tegra30-asus-tf700t.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 20 remote-endpoint = <&bridge_input>; 21 bus-width = <24>; 36 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 44 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 52 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 60 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 68 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | nxp,imx-mipi-csi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver 10 - Rui Miguel Silva <rmfrfs@gmail.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 description: |- 14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2 19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/ddr/ |
D | jedec,lpddr3-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin 10 - Krzysztof Kozlowski <krzk@kernel.org> 14 const: jedec,lpddr3-timings 19 Maximum DDR clock frequency for the speed-bin, in Hz. 20 Property is deprecated, use max-freq. 23 max-freq: [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/display/ |
D | solomon,ssd1307fb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Maxime Ripard <mripard@kernel.org> 11 - Javier Martinez Canillas <javierm@redhat.com> 17 - items: 18 - enum: 19 - solomon,ssd1305fb-i2c 20 - solomon,ssd1306fb-i2c 21 - solomon,ssd1307fb-i2c [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/serial/ |
D | 8250.yaml | 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - devicetree@vger.kernel.org 13 - $ref: serial.yaml# 14 - if: 16 - required: 17 - aspeed,lpc-io-reg 18 - required: 19 - aspeed,lpc-interrupts 20 - required: [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/iio/imu/ |
D | adi,adis16480.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandru Tachici <alexandru.tachici@analog.com> 15 - adi,adis16375 16 - adi,adis16480 17 - adi,adis16485 18 - adi,adis16488 19 - adi,adis16490 20 - adi,adis16495-1 [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/iio/adc/ |
D | fsl,vf610-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Haibo Chen <haibo.chen@nxp.com> 18 - items: 19 - enum: 20 - fsl,imx6sx-adc 21 - fsl,imx6ul-adc 22 - const: fsl,vf610-adc [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
D | synopsys-dw-mshc-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: "mmc-controller.yaml#" 13 - Ulf Hansson <ulf.hansson@linaro.org> 20 reset-names: 23 clock-frequency: 25 Should be the frequency (in Hz) of the ciu clock. If this 26 is specified and the ciu clock is specified then we'll try to set the ciu [all …]
|
12345678910>>...21